But most of the time, when the cell phone is close to the base station, much lower transmitting power is required.
In this case if the power is supplied from the battery, excessive headroom will cause significant power loss.
A better solution is to decrease the supply voltage to a much lower level where sufficient voltage headroom is still maintained. In this way the power dissipation is reduced considerably.
Dynamical voltage control scheme saves battery power most effectively when the necessary Pout is in a low level , as a result, talk time can be increased dramatically as well.
The figure above shows several different decided voltages in term of output power. In different changeable Vcc, the PAE will have big change.
1. 3.4v for all time,
2, tow steps, high mode is 3.4v, while 1.25v for middle and low mode. This should be common way. It’s easy to realize.
3. Four Steps 3.4V 1.5V 1.0V, 0.6v, this should be more accurate than two mode, but make you SW become complex.
4. 0.6V to 3.4C continuous
The figure below shows another changeable Vcc value according to four power step.
The theory and test before same quite make sense, then, I select one PA demo board, did several experiments according to that method, first, make the PA at lower power mode, output 5dBm, the highest probability happen for phone transmitter power.
I fixed VCC to 3.4V, slight reduce Vref from 3.0 to 2.8V for 0.5V each step, the Current reduce 17mA overall. It’s seems that lower Vref is a way to reduce current. But 17mA is not quite enough , at same time , the PA manufacture will not recommend you to reduce the Vref for it’s importance, it’s better set that value at typical value. So, I changed the Vref back to its typical voltage 2.9V.
Because the in PA High Mode, there is no any chance to reduce current through change Vcc ,while you can use load pull skill optimize current to reduce 30 to 50mA . I set PA works on low power mode and carefully reduce the Vcc value.
one thing we have to concern is that when PA works on 16dBm ,the edge low power mode ,before jump to 3.4V Vcc high power mode, If the reduce Vcc is too low ,you will find the ACPR at that point is very worse ,can not ensure the PA necessary linearity, Finally I choose Vcc at 1.5V ,thus even the at 16dBM , the ACPR still have 4dB Margin to ensure the first stage PA has better performance. If the power is increase to 17dBm , the SW will change PA mode , turn on the both two stage internal PA to works on in high more ,and Vcc increase to 3.4V or connect to Battery directly.
Here is some my finally test data, the current reduction is not obviously as I expect. At 5dBm point only reduce 8 mA, at 0dBm point reduce about 10mA. This unsatisfied test result maybe due to the PA I selected or instrument and cable loss compensation. The main reason I think is because the PA inherent performance, when decrease Vcc at low power mode, some one could save more current, some one maybe not obviously.