EMI in Switched Mode Power Supplies (SMPS)
开关电源的电磁干扰
Switched Mode Power Supplies are usually a part of a complex electronic system. The system operates with electric signals with much lower amplitude and energy compared to those on an SMPS. It means that usually the SMPS is the strongest electrical noise generator in the whole system.
开关电源通常会是一部电子设备的组成部分。电子设备里运行的电信号相对开关电源里的在幅值和能量上要小得多。这意味着开关电源通常是电子设备里的最强干扰源。
Especially the power switches with their high dv/dt and di/dt switching slopes are the sources of EMI. The source of differential mode interferences is the current switched by a MOSFET or a diode. High rates of dv/dt and parasitic capacitors to the ground are the reasons for common mode interferences.
尤其功率开关对电压和电流的高速切换是电磁干扰的源头。差模干扰来源于场效应晶体管或二极管对电流的开关。高速率的电压变化和对地的分布电容是产生共模干扰的原因。
Factors of influence on EMI spectrum
电磁干扰频谱的影响要素
Different parameter can affect the EMI spectrum of an SMPS, e.g. the switching slopes of the power semiconductors, the operating point regarding switch voltages and currents. Some of these influence factors will be analyzed in this chapter.
不同的因素都能影响开关电源的电磁干扰频谱，举例来说，功率半导体的开关速度，运行点的开关电压和电流。此章将分析这些干扰因素。
Test setup
测试装置
The results presented in this chapter have been made using the shown test setup (Fig. 9), if not other specified. The test setup is a chopper without an EMI filter using 380mΩ/11A/600V CoolMOS and Silicon Carbide Schottky diode. It can be operated in Discontinuous and Continuous Conduction Modes.
除非另外说明，此章呈现的结果来自图９所展示的测试装置。这个测试装置是使用３８０毫欧姆内阻、１１安培漏极电流、６００伏特漏源极耐压的CoolMOS和碳化硅肖特基二极管组成的无电磁干扰滤波器的断路器。它可以工作在断续和连续电感电流模式。
Fig. 9 Test chopper
图９ 测试断路器
External gate resistance
外置的栅极驱动电阻
The well-known way to control the switching speed and therefore the EMI behavior is a variation of the external gate resistance. If the resistance will be increased, the time constant determined by this resistance and the capacitance of the MOSFET will be increased as well. The switching transient will be slowed down and thereby the electrical noise becomes lower. Fig. 10 shows the controllability of the di/dt and dv/dt values for turn on and turn off transients of CoolMOS SPP11N60C3.
众所周知，控制开关速度来改变电磁干扰的方法是改变栅极驱动电阻。如果电阻增加，由这个电阻和场效应晶体管的栅极电容决定的时间常数将增加。开关过程变慢导致电磁噪声下降。图１０展示了SPP11N60C3型号的CoolMOS在不同栅极电阻驱动下开通和关断过程的电流、电压变化速率。
典型漏极电流变化速率
随栅极驱动电阻变化的漏极电流变化速率，感性负载，１２５摄氏度结温，３８０伏特漏源极电压，０至正１３伏特栅源极电压，１１安培的漏极电流
典型漏源极电压变化速率
随栅极驱动电阻变化的漏源极电压变化速率，感性负载，１２５摄氏度结温，３８０伏特漏源极电压，０至正１３伏特栅源极电压，１１安培的漏极电流
Fig. 10 Typical switching slopes versed gate resistance of CoolMOS SPP11N60C3
图１０ 典型随CoolMOS SPP11N60C3栅极驱动电阻变化的漏极开关变化速率
As it can be seen the drain current and drain to source voltage slopes can be adjusted simply using the external gate resistor during turn on and off transients. The noise emission can be also controlled in this way in high frequency range (Fig. 11 and Fig. 12).
显而易见，开通和关断过程的漏极电流、漏源极电压变化速率可以简单的通过外置栅极驱动电阻进行调整。在高频范围的噪声辐射也可通过此方法控制（图１１和图１２）。
Fig. 11 Influence of the external gate resistance (discontinuous current mode, Id=6A, measured)
图１１ 外置栅极驱动电阻的影响（断续电感电流模式，６安培漏极电流）
Fig. 12 Influence of the external gate resistance (continuous current mode, Id=6A, measured)
图１2 外置栅极驱动电阻的影响（连续电感电流模式，６安培漏极电流）
Gate-source and drain-source voltage
栅源极电压和漏源极电压
The appropriate spectrum for 6 A peak drain-current, 13 V gate voltage and 380 V drain-source voltage has been chosen as reference.
为在峰值６安培漏极电流下获得适当的频谱，选择１３伏特的栅源极电压和３８０伏特的漏源极电压为参考。
Different maximum values of the gate-source voltage (or Vcc of the control IC) were investigated – 10V, 13V and 15V.
不同的栅源极电压最大值（或是控制集成电路的电源电压）被选择——１０伏特，１３伏特和１５伏特。
Also the variation of the bus voltage from 380V to 200V has been measured.
同样从３８０伏特到２００伏特的直流母线电压被选定。
Fig. 13 shows that a change of the gate voltage from 10V to 15V hardly influences the spectrum. It can be explained by the fact, that 10V is still high enough to fully open the MOSFETs channel. Further reduction to values close to Miller plateau for the given operating point will slow down the switching and reduce the spectra.
图１３展示出栅源极电压从１０伏特到１５伏特变化几乎不对干扰频谱产生影响。他可以解释这样的事实：１０伏特已经足够开通金属氧化物场效应晶体管的导电沟道。进一步减小米勒电场将导致开关速率变慢并降低干扰频谱幅值。
Fig. 13 Influence of the gate and drain-source voltage (discontinuous conduction mode, Id=6A, Rgate="6".8 Ohm, measured)
图１３ 栅源极电压和漏源极电压的影响（断续电感电流模式，６安培漏极电流，６.８欧姆栅极电阻）
The decrease of the drain-source voltage or bus voltage affects the entire spectrum evenly according to Fourier theory. It means that the spectrum will decrease with the drain-source voltage.
降低漏源极直流母线电压影响干扰信号按傅立叶展开式的全部频带。这意味着干扰频谱幅值随漏源极电压的降低而降低。
Drain current
漏极电流
The peak values of the drain current have been varied in discontinuous (2A, 6A, 11A) and continuous (2A, 6A) conduction modes.
漏极的峰值电流被设定为断续电感电流模式下的２安培、６安培、１１安培和连续电感电流模式下的２安培。
Only little differences in the frequency range under 1 MHz at different current peak values (Fig. 14 and Fig. 15) can be noticed except from some resonance frequencies. The drain current was not decreased enough to operate the CoolMOS switch in the linear field of its output characteristic. Thus the dv/dt of the switch remained the same and thereby the spectrum changes can be hardly recognized.
除了几个谐振频率，在１兆赫兹以下的频带，干扰信号在不同峰值电流下测试出来的结果仅有微小的差别（图１４和图１５）。CoolMOS开关的漏极电流没有减小到足够进入输出特性的线性区域。因此相同的电压变化速率几乎不对干扰信号的频谱产生影响。
Fig. 14 Influence of the drain current (discontinuous current mode, Rgate="6".8 Ohm, measured)
图１４ 漏极电流的影响（断续电感电流模式，６.８欧姆栅极驱动电阻）
Fig. 15 Influence of the drain current (continuous conduction mode, Rgate="6".8 Ohm, measured)
图１５漏极电流的影响（连续电感电流模式，６.８欧姆栅极驱动电阻）
Flyback converter example
反激变换器的例子
Analysis of basic waveforms
基本波形分析
The analysis of the basic waveforms will be done on a simulated example of a flyback converter operating in discontinuous conduction mode. Typical drain-source voltage waveform of the primary side switch is shown in Fig. 16.
在电感电流断续模式下运行的反激变换器的典型一次侧漏源极开关电压波形见图１６。
Fig. 16 Typical drain-source voltage of the MOSFET in a flyback
图１６ 反激变换器的典型漏源极电压
These drain-source voltage waveforms can be theoretically distinguished into typical elements. Different physical phenomena influence the waveform at given time interval. Fig. 17 and Tab. 4 demonstrate the main elements of the voltage waveform. The superposition of all these elements results in a typical drain-source voltage shown in Fig. 16.
这些漏源极电压波形能用典型的理论来描述。各个时间段有不同物理现象影响这些波形。图１７和平台４描述了电压波形的主要原理。把这些原理按时序整合呈现出图１６所示的典型漏源极电压。
Fig. 17 Main elements of the drain-source voltage
图１７ 漏源极电压的主要原理
原理１：开通期间的电压下降过程
原理２：在开通期间因寄生震荡产生的电流尖刺
原理３：关断期间的电压上升
原理４：缓冲电路的钳位电压
原理５：钳位过程结束后主要由场效应晶体管输出电容和变压器漏感引起的寄生振荡
原理６：磁芯存储磁能释放完毕后主要由场效应晶体管输出电容和变压器电感引起的寄生振荡
原理７：反激变换器释放磁能期间的反射电压
原理８：与直流母线电压等幅的主要方波
Tab. 4 Main elements of the drain-source voltage
平台４ 漏源极电压的主要原理
The spectrum of the whole drain-source waveform (Fig. 16) is presented in Fig. 18.
图１６所示的漏源极电压呈现的电磁干扰频谱见图１８。
Fig. 18 Spectrum of the drain-source voltage (as shown in Fig. 16)
图１８ 图１６所示的漏源极电压呈现的电磁干扰频谱
The spectra of the main elements of the drain-source voltage can be found in Fig. 20. Fig. 19 is exactly the same as Fig. 17 and has been repeated here for better under-standing.
图２０描述了漏源极电压主要原理产生的电磁干扰频谱。为便于理解，将图１７映射成图１９。
Fig. 19 Main elements of the drain-source voltage (repeated, same as Fig. 17)
图１９ 漏源极电压的主要原理（正确重复 图１７）
Fig. 20 Spectra of the main elements of the drain-source voltage
图２０ 漏源极电压主要原理产生的电磁干扰频谱
This method allows associating certain parts of the spectrum with their root causes, i.e. the peak at 20 MHz in the spectrum of the drain-source voltage is caused by the parasitic oscillation due to the output capacitance of the MOSFET and the leakage inductance of the transformer.
这种方法可以确定电磁干扰频谱中某些频点的来源，也就是说漏源极电压产生的电磁干扰频谱中的２０兆赫兹峰点是钳位过程结束后主要由场效应晶体管输出电容和变压器漏感引起的寄生振荡产生的。
The analysis of the drain current of the primary switch will be done in the same way. Fig. 21 demonstrates a typical drain current in a DCM flyback.
对一次侧开关的漏极电流进行分析采用相同的方法。图２１展示出一个工作于电感电流断续模式反激变换器的典型漏极电流。
Fig. 21 Typical drain current in a flyback
图２１ 反激变换器的典型漏极电流
This waveform can be presented as a superposition of the following elements (Fig. 22 and Tab. 5). The superposition of all these elements results in a typical drain current shown in Fig. 21.
这个波形可以被看作是下列原理的叠加（图２２和平台５）。全部这些波形的叠加整合结果变成图２１所示的典型漏极电流。
Fig. 22 Main elements of the drain current
图２２ 漏极电流的主要原理
原理１：漏极电流的主要三角波形
原理２：在开关开通期间因寄生分布电容引起的电流尖刺
原理３：钳位过程结束后主要由场效应晶体管输出电容和变压器漏感引起的寄生振荡
原理４：磁芯存储磁能释放完毕后主要由场效应晶体管输出电容和变压器电感引起的寄生振荡
Tab. 5 Main elements of the drain current
平台５ 漏极电流的主要原理
The spectrum of the whole drain current waveform (Fig. 21) is presented in Fig. 23.
全部漏极电流波形产生的电磁干扰频谱（图２１）呈现在图２３。
Fig. 23 Spectrum of the drain current (as shown in Fig. 22)
图２３ 漏极电流产生的电磁干扰频谱（与图２２相同）
The spectra of the main elements of the drain current can be found in Fig. 25. Fig. 24 is exactly the same as Fig. 22 and has been repeated for better understanding.
漏极电流主要原理产生的电磁干扰频谱见图２５。图２４和图２２相同。
Fig. 24 Main elements of the drain current
图２４ 漏极电流的主要原理
Fig. 25 Spectra of the main elements of the drain current
图２５ 漏极电流主要原理产生的电磁干扰频谱
As in case of drain-source voltage this method allows to associate the elements of the drain current waveform wi