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FPGA自己产生reset

遇到一个FPGA没有外部的reset,只能自己产生了,这么简单一个问题居然想了很久才实现。在modelsim仿真是对的,还没有实际操作,也希望和大家讨论一下

module reset_generation(inclk,reset);
input inclk;
output reset;
reg flag,reset;
reg [1:0] counter;

always @ (posedge inclk)
begin
  case(flag) 
  1'b0: begin
        counter<=counter+1;
        if(counter==2'b11)
          begin
            flag<=1;
          end
        end
  1'b1: reset<=1;
  default:begin
          reset<=0;
          flag<=0;
          counter<=2'b00;
          end
  endcase  
end

endmodule

系统分类: CPLD/FPGA
用户分类: Verilog
标签: 无标签
来源: 原创
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Use Spice model in PSpice

 

一般的IC厂商只提供spice的模型,其扩展名各种各样:spi, lib…… 不管什么扩展名,都可以按照TI给的方法使之可以被PSpice使用。

1.       PSpice Model Editor

file – newNext select Model, Import, and then the file name of the model. The ASCII text file appears in the right window, and the left window shows that the model name is THS4131, and the type is SUBCKT.

Next do a File, Save, and give it a filename.

Next, do a File, Create Capture Parts. A dialog Box appears. Browse to the location where the new library is stored, and select it. The bottom box is then filled with the same filename, in the same location, with a .olb extension:

Click OK, and the library should create with no errors:

Click OK to close the status file, and exit the model editor. There should now be two files in the destination directory—THS4131.lib and ths4131.olb. Both are necessary for simulation.

2. Edit the Part Symbol in Capture

File, Open, Library, and browse to the location of THS4131.olb.不要改pin name,修改pin numberpin name一致。然后把pin name隐藏,添加text作为pin的名字。

Do not change the pin name because that is the way the symbol relates back to the Spice model.

Add the library (.lib) file to the simulation profile.

OK!!

系统分类: 模拟技术
用户分类: Analog
标签: PSpice 器件模型
来源: 原创
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