TDM

        时分多路复用

TDM是将传输时间划分为许多个短的互不重叠的时隙，而将若干个时隙组成时分复用帧，用每个时分复用帧中某一固定序号的时隙组成一个子信道，每个子信道所占用的带宽相同，每个时分复用帧所占的时间也是相同的，即在同步TDM中，各路时隙的分配是预先确定的时间且各信号源的传输定时是同步的。对于TDM，时隙长度越短，则每个时分复用帧中所包含的时隙数就越多，所容纳的用户数也就越多.

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别了 我的大学 别了兄弟们

兄弟们 珍重！

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cordic verilog 程序及仿真结果 8级流水线

module cordic(clk,rst_n,in,out);
parameter DATA_WIDTH=16;
input     clk;
input     rst_n;
input  [DATA_WIDTH-1:0]  in;
output [DATA_WIDTH-1:0] out;
reg    [DATA_WIDTH-1:0] out;
reg    [DATA_WIDTH-1:0] x0,y0,z0;
reg    [DATA_WIDTH-1:0] x1,y1,z1;
reg    [DATA_WIDTH-1:0] x2,y2,z2;
reg    [DATA_WIDTH-1:0] x3,y3,z3;
reg    [DATA_WIDTH-1:0] x4,y4,z4;
reg    [DATA_WIDTH-1:0] x5,y5,z5;
reg    [DATA_WIDTH-1:0] x6,y6,z6;
reg    [DATA_WIDTH-1:0] x7,y7,z7;
reg    [DATA_WIDTH-1:0] x8,y8,z8;
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x0<=16'b0000_0000_0000_0000;
         y0<=16'b0000_0000_0000_0000;
         z0<=16'b0000_0000_0000_0000;
      end
   else
       begin
            x0 <= 16'h4DBA;
            y0 <= 16'h0000;
            z0 <= in;
         end
end

//level 1
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x1<=16'b0000_0000_0000_0000;
         y1<=16'b0000_0000_0000_0000;
         z1<=16'b0000_0000_0000_0000;
      end
   else
        if(z0[15]==1'b0)
            begin
               x1 <= x0 - y0;
               y1 <= y0 + x0;
               z1 <= z0 - 16'h4000;  //45deg
            end
         else
            begin
               x1 <= x0 + y0;
               y1 <= y0 - x0;
               z1 <= z0 + 16'h4000;  //45deg
            end
end

//level2
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x2<=16'h0000 ;
         y2<=16'h0000 ;
         z2<=16'h0000 ;
      end
   else
      
         if(z1[15]==1'b0)
            begin
               x2 <= x1 - {y1[DATA_WIDTH-1],y1[DATA_WIDTH-1:1]};
               y2 <= y1 + {x1[DATA_WIDTH-1],x1[DATA_WIDTH-1:1]};
               z2 <= z1 - 16'h25c8;  //26.5651deg
            end
         else
            begin
               x2 <= x1 + {y1[DATA_WIDTH-1],y1[DATA_WIDTH-1:1]};
               y2 <= y1 - {x1[DATA_WIDTH-1],x1[DATA_WIDTH-1:1]};
               z2 <= z1 + 16'h25c8;  //26.5651deg
            end
end

//level3
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x3<=16'b0000_0000_0000_0000;
         y3<=16'b0000_0000_0000_0000;
         z3<=16'b0000_0000_0000_0000;
      end
   else
       
         if(z2[15]==1'b0)
            begin
               x3 <= x2 - {{2{y2[DATA_WIDTH-1]}},y2[DATA_WIDTH-1:2]};
               y3 <= y2 + {{2{x2[DATA_WIDTH-1]}},x2[DATA_WIDTH-1:2]};
               z3 <= z2 - 16'h13f6;  //14.0362deg
            end
         else
            begin
              x3 <= x2 + {{2{y2[DATA_WIDTH-1]}},y2[DATA_WIDTH-1:2]};
              y3 <= y2 - {{2{x2[DATA_WIDTH-1]}},x2[DATA_WIDTH-1:2]};
              z3 <= z2 + 16'h13f6;  //14.0362deg
            end
end            
  
//level4
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x4<=16'b0000_0000_0000_0000;
         y4<=16'b0000_0000_0000_0000;
         z4<=16'b0000_0000_0000_0000;
      end
   else
      
         if(z3[15]==1'b0)
            begin
               x4 <= x3 - {{3{y3[DATA_WIDTH-1]}},y3[DATA_WIDTH-1:3]};
               y4 <= y3 + {{3{x3[DATA_WIDTH-1]}},x3[DATA_WIDTH-1:3]};
               z4 <= z3 - 16'h0A22;  //7.1250deg
            end
         else
            begin
               x4 <= x3 + {{3{y3[DATA_WIDTH-1]}},y3[DATA_WIDTH-1:3]};
               y4 <= y3 - {{3{x3[DATA_WIDTH-1]}},x3[DATA_WIDTH-1:3]};
               z4 <= z3 + 16'h0A22;  //7.1250deg
            end
end

//level5
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x5<=16'b0000_0000_0000_0000;
         y5<=16'b0000_0000_0000_0000;
         z5<=16'b0000_0000_0000_0000;
      end
   else
   
         if(z4[15]==1'b0)
            begin
               x5 <= x4 - {{4{y4[DATA_WIDTH-1]}},y4[DATA_WIDTH-1:4]};
               y5 <= y4 + {{4{x4[DATA_WIDTH-1]}},x4[DATA_WIDTH-1:4]};
               z5 <= z4 - 16'h0516;  // 3.5763 deg
            end
         else
            begin
               x5 <= x4 + {{4{y4[DATA_WIDTH-1]}},y4[DATA_WIDTH-1:4]};
               y5 <= y4 - {{4{x4[DATA_WIDTH-1]}},x4[DATA_WIDTH-1:4]};
               z5 <= z4 + 16'h0516;  // 3.5763 deg
            end
end

//level6
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x6<=16'b0000_0000_0000_0000;
         y6<=16'b0000_0000_0000_0000;
         z6<=16'b0000_0000_0000_0000;
      end
   else

         if(z5[15]==1'b0)
            begin
               x6 <= x5 - {{5{y5[DATA_WIDTH-1]}},y5[DATA_WIDTH-1:5]};
               y6 <= y5 + {{5{x5[DATA_WIDTH-1]}},x5[DATA_WIDTH-1:5]};
               z6 <= z5 - 16'h028C;  //1.7899deg
            end
         else
            begin
               x6 <= x5 + {{5{y5[DATA_WIDTH-1]}},y5[DATA_WIDTH-1:5]};
               y6 <= y5 - {{5{x5[DATA_WIDTH-1]}},x5[DATA_WIDTH-1:5]};
               z6 <= z5 + 16'h028C;  //1.7899deg
            end
end
//level7

always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x7<=16'b0000_0000_0000_0000;
         y7<=16'b0000_0000_0000_0000;
         z7<=16'b0000_0000_0000_0000;
      end
   else
      
         if(z6[15]==1'b0)
            begin
               x7 <= x6 - {{6{y6[DATA_WIDTH-1]}},y6[DATA_WIDTH-1:6]};
               y7 <= y6 + {{6{x6[DATA_WIDTH-1]}},x6[DATA_WIDTH-1:6]};
               z7 <= z6 - 16'h0146;  // 0.8952deg
            end
         else
            begin
               x7 <= x6 + {{6{y6[DATA_WIDTH-1]}},y6[DATA_WIDTH-1:6]};
               y7 <= y6 - {{6{x6[DATA_WIDTH-1]}},x6[DATA_WIDTH-1:6]};
               z7 <= z6 + 16'h0146;  // 0.8952deg
            end
end
//level8
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
      begin
         x8<=16'b0000_0000_0000_0000;
         y8<=16'b0000_0000_0000_0000;
         z8<=16'b0000_0000_0000_0000;
      end
   else
      
         if(z7[15]==1'b0)
            begin
               x8 <= x7 - {{7{y7[DATA_WIDTH-1]}},y7[DATA_WIDTH-1:7]};
               y8 <= y7 + {{7{x7[DATA_WIDTH-1]}},x7[DATA_WIDTH-1:7]};
               z8 <= z7 - 16'h00A3;  // 0.4476deg
            end
         else
            begin
               x8 <= x7 + {{7{y6[DATA_WIDTH-1]}},y7[DATA_WIDTH-1:7]};
               y8 <= y7 - {{7{x7[DATA_WIDTH-1]}},x7[DATA_WIDTH-1:7]};
               z8 <= z7 + 16'h00A3;  // 0.4476deg
            end
end
always @(posedge clk or negedge rst_n)
begin
   if(!rst_n)
     
          out <= 16'b0000_0000_0000_0000;
         
     else
       
        out <= y8;
end
endmodule
仿真结果
仿真结果 8级流水线 误差还不小
角度
10        20         30       40        50        60       70         80
输入
5690      11207     16384     21063     25102     28378    30792     32270
输出
5794      11436     16513     21080     25087     28302    30706     32251
正弦值
0.1736    0.3420    0.5000    0.6428    0.7660    0.8660   0.9397    0.9848

仿真正弦值
0.1768    0.3490    0.5039    0.6433    0.7656    0.8637   0.9371    0.9842

系统分类: CPLD/FPGA   |    用户分类:    |    来源: 原创

什么是ＮＣＯ

NCO是与VCO 对应的 简称数控振荡器
数控振荡器(NCO)的目标是产生一个理想的正弦波或余弦波,更确切地说是产生一个频率可变的正
弦波样本。NCO 采用全数字技术,具有分辨率高、频率转换时间快、相位噪声低等特点。将其应用于电子设备中,可以大大简化系统,降低成本。例如,NCO以其高精度的频率输出, 方便的数字控制特性, 在实现
诸如I、Q 通道混频器、FSK/PSK调制器、FFT算法等得到了广泛的应用。

系统分类: CPLD/FPGA   |    用户分类:    |    来源: 原创

CORDIC 双曲函数 matlab仿真

clear;close all;clc;     %Working condition intializing
m=-1;                    % hyperbolic coordinate system
u=1;                               % rotating direction
K=0.82816;                              %修正因子
seq=[1 2 3 4 4 5 6 7 8 9 10 11 12 13 13 14 15];%旋转序列
x0=1/K;
y0=0;
z0=0.2;
for l=1:length(seq)
    x=x0-m*u*y0*2^(-(seq(l)));
    y=y0+u*x0*2^(-(seq(l)));
    z=z0-u*atanh(2^(-(seq(l))));
    x0=x;
    y0=y;
    z0=z;
    u=sign(z0);
end
x0
y0
z0

系统分类: DSP   |    用户分类:    |    来源: 原创

CORDIC 算法matlab仿真

m=1;
u=1;
K=1.6468;
a=[1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ];
y0=0;
x0=1/K;
z0=30*pi/180;
for i="1:length"(a)
   x="x0-m"*u*y0*2^(-(a(i)));
   y="y0"+u*x0*2^(-(a(i)));
   z="z0-u"*atan(2^(-(a(i))))  ;
   x0=x;
   y0=y;
   z0=z;
   u="sign"(z0);
   end
x0=x0*2^(1/2)
y0=x0*2^(1/2)
出来的结果少了个根号2 自己找不到错误的原因,就自己修正一下!
知道为什么错了了，

K出了问题 ，修正因子不正确，因为我没有45°的这个旋转 但是我把45°的修正因子给乘上去了

也就是多乘了一个2分之根号2

看看这个出来的结果！

 m=1;
u=1;
K=1.6468;
a=[0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ];
y0=0;
x0=1/K;
z0=30*pi/180;
for i="1:length"(a)
   x="x0-m"*u*y0*2^(-(a(i)));
   y="y0"+u*x0*2^(-(a(i)));
   z="z0-u"*atan(2^(-(a(i))))  ;
   x0=x;
   y0=y;
   z0=z;
   u="sign"(z0);
   end

x0 =

    0.8660

y0 =

    0.5000

结果刚刚好！

系统分类: DSP   |    用户分类: 无分类    |    来源: 原创

verilog三分频

面试的时候 面试管叫又D触发器搭三分频电路，想了半天，没有弄出来，现在自己写了一下。
module div(clk,reset,divclk);
input  clk;
input  reset;
output      divclk;
reg        divclk1;
reg        divclk2;       
reg[1:0]   counter1;
reg[1:0]   counter2;
always@(posedge clk)
begin
 if(!reset)
　　counter1<=2'b00;
 else if(counter1==2'b10)

      counter1 <=2'b00;
 
 else
 
     counter1<=counter1+2'b01;

 if(counter1==2'b0)

    divclk1<=~divclk1;

 else if(counter1==2'b10)

    divclk1<=~divclk1;
 
end

always@(negedge clk)
begin
 if(!reset)
 
   counter2<=2'b00;

 else if(counter2==2'b10)
 
   counter2<=2'b00;
 
else
 
   counter2<=counter2+2'b01;
 
 if(counter2==2'b00)
  
       divclk2<=~divclk2;

 else if(counter2==2'b10)
   
    divclk2<=~divclk2;

end



assign divclk=divclk1|divclk2;
endmodule
仿真波形

系统分类: CPLD/FPGA   |    用户分类:    |    来源: 原创

CORDIC算法研究！

CORDIC 算法是由J . Volder[2 ] 于1959 年提出的。CORDIC 算法适用于解决一些三角学的问题,如平面坐标的旋转和直角坐标到极坐标的转换等。该算法的基本思想是通过一系列固定的、与运算基数有关角度的不断偏摆以逼近所需的旋转角度。


上面完成了数学推导，可以在FPGA很容易的实现

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毕业了 工作了

吃完散伙饭了，是该走了，虽然找到自己的方向，但是有些失落，希望一切顺利，顺利通过公司体检，顺利入职，祝福自己，一路顺风！

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