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quadrature signals and the application
发表于 2008-5-10 1:55:23

    Quadrature signals are two signals generated with a 90 degrees phase difference. They are used in mechanical systems to determine movement (or rotation) of an axis.

    Here's one axis moving forward by a few steps.

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If you count the pulses, you can say that the axis moved by 3 steps.
If you count the edges, you can say that the axis moved by 12 steps. That's what we do on this page.

Now the axis is moving backward by the same amount.

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Where are they used?

  • In robotic axles, for feedback control.
  • With knobs, to determine user input.
  • In computer mice, to determine the direction of movement.

If you open a mechanical mouse, here's what you can see.

 

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There are two optical quadrature encoders, each made from a slotted wheel, a light emitter and a pair of photodetectors.

The mouse includes an IC responsible for the quadrature decoding and the serial/PS2 interface. Since it is easier to create a quadrature decoder (in an FPGA) than a serial or PS2 interface, we modified the mouse and replaced the original IC with a quad-buffers Schmitt trigger inputs IC.

 

 

 

We used a CD4093 with the inputs of the each NAND gate tied together to form inverters.
Now the mouse outputs a quadrature encoded signal!

Quadrature decoder

We want to implement a counter that increments or decrements according to the quadrature signals. We assume that we have available an "oversampling clock" (named "clk" in this page) that is faster than the quadrature signals.

The hardware circuit that controls the counter is surprisingly simple to do.

 

 

Here's a waveform where an axis moves in forward direction, so that the counter increments.

 

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This circuit is sometimes called a "4x decoder" because it counts all the transitions of the quadrature inputs.

Real life circuit

The previous circuit assumed that the "quadX" inputs were synchronous to the "clk" clock. In most cases, the "quadX" signals are not synchronous to the clock. The classical solution is to use 2 extra D-flipflops per input to avoid introducing metastability into the counter.

 

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                                             (mainly from fpga4fun.com)

 

 

 
系统分类: 模拟技术
用户分类: FPGA
标签: quadrature
来源: 整理
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Verilog HDL 中时间尺度
发表于 2008-5-9 20:34:54

`timescale是Verilog HDL 中的一种时间尺度预编译指令，它用来定义模块的仿真时的时间单位和时间精度。格式如下：

`timescale  仿真时间单位/时间精度

注意：用于说明仿真时间单位和时间精度的数字只能是1、10、100，不能为其它的数字。而且，时间精度不能比时间单位还要大。最多两则一样大。比如：下面定义都是对的：

`timescale   1ns/1ps

`timescale   100ns/100ns

下面的定义是错的：

`timescale  1ps/1ns

时间精度就是模块仿真时间和延时的精确程序，比如：定义时间精度为10ns，那么时序中所有的延时至多能精确到10ns，而8ns或者18ns是不可能做到的。

下面举个简单的例子说明一下：

 

`timescale 100ns / 10ns

 

module muti_delay(

                  din,

                                          dout1

                                     );

 

input             din;

output            dout1;

 

wire              din;

reg               dout1;

 

always            @(din)

      

        #3.14        dout1 = din;