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发表于 2010/3/18 12:05:30

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clock的处理(未完)

clock的处理

1. 概念:

1.1 clock tree:从一个clock源出发,clock网络经过多级buffer,到达每个时序器件的clk脚。为了保证从clock源到每个器件clk脚的延时相差不多,clock在布局布线时做成树形网络结构,叫做clock tree。
1.2 clock latency:clock源到时序器件的clk脚的延迟叫做clock latency。
1.3 clock jitter:clock源是芯片外部管脚引入或是内部PLL产生的。clock的每个周期时间都会有微小的偏差,这种偏差叫做clock jitter。参见:http://blog.ednchina.com/olivernie/169580/message.aspx
1.4 clock skew:clock在不同时序器件clk脚上的时间差异叫做clock skew。
1.5 clock uncertainty:clock在时序器件clk脚上的不确定性,包括clock jitter和clock skew两部分的总和。
1.6 clock transition:clock信号的slew时间。分为上升沿时间和下降沿时间。
1.7 clock gating:指门控时钟。由于低功耗的要求,有些模块会停止工作。通过停掉clock减少这些模块的耗电。




2. DC综合:
2.1 create_clcok:
2.2 set_clock_uncertainty:
2.3 set_clock_transition:
2.4 set_clock_latency:

3. STA:

4. P&R:

系统分类: CPLD/FPGA  |  用户分类: ASIC DESIGN  |  标签: DC 综合 clock  |  来源: 原创  | 

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发表于 2009/8/12 14:19:35

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SSH下文件传输


sftp: 假设ssh服务器为192.168.8.1,ssh端口为2122,ssh用户名为user,user的私钥文件为id_rsa。使用sftp登陆192.168.8.1
  sftp -oPort=2122 -oIdentityFile=id_rsa user@192.168.8.1

  获取帮助
  sftp -h


scp:如上假设,要把服务器上的目录/home/user/test/ 拷贝到本地当前目录
     scp -r -P 2122 -i id_rsa user@192.168.8.1:/home/user/test/ ./

     要把本地目录test.txt文件拷贝到服务器/home/user/test/下
     scp -P 2122 -i id_rsa ./test.txt user@192.168.8.1:/home/user/test/

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发表于 2009/7/31 14:19:50

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Time Borrowing in Latch-based Designs (copied)

Copied from "design compiler technology background"


You can leverage Design Compiler’s unique technique, time borrowing, to optimize near-critical paths and reduce delay costs in latch-based designs. A latch is a simple, 1-bit level sensitive memory device. Design Compiler allows borrowing time from next clock cycle to extend the time during which latch is enabled if the path leading to the data pin of a latch is too long. For example, in the following two-stage latch based design, the combinational logic block between Latch1 and Latch2 may have more delay than the delay between Latch2 and Latch3. To resolve this discrepancy, the first stage can borrow time from the second clock cycle. In this event, the second clock cycle is left with less time to accommodate the combinational logic block between Latch2 and Latch3.


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系统分类: CPLD/FPGA  |  用户分类: ASIC DESIGN  |  标签: synthesize DC timing analysis time borrow  |  来源: 整理  | 

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发表于 2009/7/13 18:13:31

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synchronize folders

#!/bin/sh

#synchronize folders
show_usage() {
   
echo "Usage:"
    echo "  synch_folder [-e NAME] src_folder des_folder"
    echo ""
    echo "    Copy files from src_folder to des_folder. If -e NAME is given, the"
   
echo "    files or sub-folders with this name won't be copied."
   
echo ""
   
echo "Synchronize folders, write by Oliver Nie."
   
return 1
}


#validate the parameter number

if
[ $# -lt 2 ]; then
    show_usage
   
exit 1
fi

#validate the parameter number
if
[ $1 = "-e" ] && [ $# -lt 4 ]; then
   
echo "Two folders must be given."
    show_usage
   
exit 1
fi

#get the parameters
if
[ $1 = "-e" ]; then
   
ex_name=$2
   
src=$3
   
des=$4
else

   
src=$1
    des=$2
fi

if
[ ! -e $src ] || [ ! -e $des ]; then
   
echo "Folder $src or $des is not existed."
    show_usage
   
exit 1
fi


#output the file list

if
[ -z $ex_name ]; then
   
pushd $src
   
find . -print | sed "s/\.\///g"  | sort > ../src_list
   
popd
   
pushd $des
   
find . -print | sed "s/\.\///g"  | sort > ../des_list
   
popd
else
 
# supress the given name
   
pushd $src
    find . -path "*$ex_name" -prune -o -print | sed "s/\.\///g" | sort > ../src_list
   
popd
   
pushd $des
    find . -path "*$ex_name" -prune -o -print | sed "s/\.\///g" | sort > ../des_list
   
popd
fi

cnt=0
# file list in both folders

for
i in `
comm -12 src_list des_list`; do
    if
[ -d "$src/$i" ]; then
       
continue
    else

        cp $src/$i $des/$i -f
       
cnt=`expr $cnt + 1`
    fi
done

#echo "Total $cnt files copied!"
# file list only in source folder
for i in `comm -23 src_list des_list`; do
    if
[ -d "$src/$i" ]; then
       
mkdir $des/$i
        continue
    fi
   
cp $src/$i $des/$i -f
   
cnt=`expr $cnt + 1`
done


echo
"Total $cnt files copied!"

rm
src_list des_list

系统分类: 软件开发  |  用户分类: ASIC DESIGN  |  标签: folders synchronize  |  来源: 原创  | 

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发表于 2009/6/29 13:01:13

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vim中转换tab为空格 vim: Convert [tab] to [space]


在vim中,有时需要将tab转换成space。使用ret命令(replace tab)。
[range]ret[ab]! [new-tabstop]

举例:将第一行到文件尾的tab转换成space,每个tab用4个space替代。
:set expandtab
:%ret! 4
如果没有给定4,则用当前的tab宽度设定替换为space。

其它相关命令:
:set tabstop=4        设定tab宽度为4个字符
:set shiftwidth=4     设定自动缩进为4个字符
:set expandtab        用space替代tab的输入
:set noexpandtab      不用space替代tab的输入


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发表于 2009/6/22 15:36:21

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bc: convert base for numbers in linux

How to use bc to convert base of numbers in linux?

Example 1, convert decimal number, 64, to hexadecimal number.
 $echo "ibase=10; obase=16; 64" | bc
 40

Example 2, convert hexadecimal number, 100 to decimal number.
 $echo "ibase=16; obase=A; 100" | bc
 256

Note: The default base for both input and output is 10. The ibase is changed to be 16 in the second example. So, the obase setting is in hexadecimal number. A in this case means 10.

Example 3, convert decimal number, 1.25 to binary number.
 $echo "ibase=10; obase=2; 1.25" | bc
 1.0100000


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发表于 2009/6/15 11:06:36

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Reading and writing files from Verilog models

reference: http://larc.ee.nthu.edu.tw/~lmdenq/doc/fileio.htm

Introduction


This describes how you can read and write files in a Verilog model using a set of user functions, based on the C stdio package. With these functions you can perform file input and output directly in Verilog models without having to learn C or the PLI. This code works with VCS, MTI, Verilog-XL, and NC-Verilog (see $fread for one restriction).

Note that Synopsys' VCS 6.1, NC-Verilog 3.3, and MTI's ModelSim 5.5 offer native support for the IEEE-1364 2001 standard. Verilog-XL does not support these tasks except through this PLI application.


Overview


This application note describes how your Verilog model or testbench can read text and binary files to load memories, apply stimulus, and control simulation. Files can also be written. The format of the file I/O functions is based on the C stdio routines, such as fopen, fgetc, fprintf, and fscanf.

The Verilog language has a rich set of system functions to write files ($fdisplay, $fwrite, etc.) but only reads files with a single, fixed format ($readmem). In the past if you wanted to read a file that was not in $readmem format, you would have to learn the Programming Language Interface (PLI) and the C language, write C code to read the file and pass values into Verilog, then debug the combined C and Verilog code. In addition, the Verilog is limited to 32 open files at a time.

However, using the new file I/O system functions you can perform your file I/O directly from Verilog. You can write Verilog HDL to:

  • read stimulus files to apply patterns to the inputs of a model
  • read a file of expected values for comparison with your model
  • read a script of commands to drive a simulation
  • read either ASCII or binary files into Verilog registers and memories
  • have hundreds of log files open simultaneously (though they are written to one at a time)
Code for all the examples in this file is included in the examples directory for the file I/O functions.

Note that these system tasks behave the same as the equivalent stdio routines. For example, $fscanf will skip over white-space, including blank lines, just like fscanf(). You can prototype code in C then convert it to Verilog.


Differences between fileio and IEEE-1364 Verilog-2001 (V2K) standard


The following list describes the differences between my file I/O package (fileio) and the IEEE-1364 Verilog-2001 standard (V2K).

1) In fileio $fopen has read, write, append variants:
     file = $fopenr("filename");
     file = $fopenw("filename");
     file = $fopena("filename");

In V2K, there is a single $fopen for both multi-channel descriptors (MCD) and file descriptors (FD).  Whether an FD or MCD is produced is indicated by the presence of a mode string added to $fopen in V2K:
     file = $fopen("filename", "w");    // FD
     file = $fopen("filename");         // MCD

Fileio supports the V2K $fopen format under a package compilation switch but that then blocks any use of MCDs since it hides the builtin $fopen.

2) Fileio $fclose has read and write variants that return a status:
     r = $fcloser(file);
     r = $fclosew(file);

In V2K, there is a single $fclose for both MCDs and FDs.  It does not return a status.  Errors can be determined by using $ferror.

Fileio supports the V2K $fclose format under a package compilation switch but that then blocks any use of MCDs since it hides the builtin $fclose.

3) Fileio $getchar is not directly supported in Verilog-2001.  The operation can be done by using $fgetc('h8000_0000) which makes use of the reserved FD for stdin.

4) Fileio defines $fgets as:
     r = $fgets(string, n, file);

V2K does not support a maximum count "n" of characters to read. Input in V2K always terminates at end of line and then string assignment to the target is done.

Fileio's $gets is not directly supported in Verilog 2001.  The operation can be done by using:
    $fgets(string, 'h8000_0000);
that makes use of the reserved FD for stdin.

5) Fileio $scanf is not directly supported in Verilog 2001.  The operation can be done by using:
    $fscanf('h8000_0000, format, args);
which makes use of the reserved FD for stdin.

6) Fileio does not support ? as an alias for X; V2K does.

7) Fileio does not support reading X or Z for %d format specification; V2K does.

8) Fileio supports %f, but not the synonyms %e and %g.  V2K supports all three.  Fileio does not support %f on in $sscanf; V2K supports all specifiers in $sscanf.

9) Fileio does not support %u, %z, %v, %t, or %m input format specifiers; V2K supports all of them.

10) Fileio supports special character input handling for \ (i.e. \\, \oNNN); V2K does not support this (not in LRM).

11) Fileio requires that $fread on a memory use "mem[0]" as the memory referend.  V2K requires "mem" since "mem[0]" will be taken as a register read.

12) Fileio defines $sprintf and $fprintf which are not defined in V2K.  V2K defines the $swrite family of tasks for string ouput and allows both MCDs and FDs in the $fwrite, $fdisplay, $fmonitor, and $fstrobe families of tasks.  V2K supports $sformat where the difference in $sformat and $swrite is in the management of format specification strings.  Fileio requires a single format string in $sprintf, etc; V2K follows the normal Verilog convention of treating any constant strings as format specifiers for $swrite.  In V2K, all output format specifications are consistent and produce the same result independent of whether the target is a string, file, or standard output.

13) Fileio $ferror only returns a status.  V2k $ferror takes a second parameter and stores the error string in that register.  Additionally, V2K $ferror accepts a file descriptor with the value 0 and simple produces the most recent system error status.

14) Fileio requires an argument to $fflush; V2K permits a parameterless call and flushes all files (including MCD files) in that case.  V2K $fflush supports either MCDs or FDs.

15) V2K supports $rewind which Fileio does not.

16) Fileio supports $fputc which V2K does not.

17) Fileio supports $feof which V2K does not.  Some functions such as $fgetc return EOF (-1) but this is not the same.


File Input Functions


The file I/O system functions and tasks are based on the C stdio routines. For more information on the stdio routines, consult a C manual. The major differences between these system tasks and C are caused by the lack of a pointer variable in the Verilog language. Strings in Verilog are stored in registers, with 8 bits needed to store a single character.

OPEN A FILE

integer file;
file = $fopenr("filename");
file = $fopenw("filename");
file = $fopena("filename");
The function $fopenr opens an existing file for reading. $fopenw opens a new file for writing, and $fopena opens a new file for writing where any data will be appended to the end of the file. The file name can be either a quoted string or a reg holding the file name. If the file was successfully opened, it returns an integer containing the file number (1..MAX_FILES) or NULL (0) if there was an error. Note that these functions are not the same as the built-in system function $fopen which opens a file for writing by $fdisplay. The files are opened in C with 'rb', 'wb', and 'ab' which allows reading and writing binary data on the PC. The 'b' is ignored on Unix.

CLOSE A FILE

integer file, r;
r = $fcloser(file);
r = $fclosew(file);
The function $fcloser closes a file for input. $fclosew closes a file for output. It returns EOF if there was an error, otherwise 0. Note that these are not the same as $fclose which closes files for writing.

TEST FOR END OF FILE

integer file;
reg eof;
eof = $feof(file);
The function $feof tests for end of file. If an end-of-file has been reached while reading from the file, a non-zero value is returned; otherwise, a 0 is returned.

RETURN FILE STATUS

integer file;
reg error;
error = $ferror(file);

The function $ferror returns the error status of a file. If an error has occurred while reading from a file, $ferror returns a non-zero value, else 0. The error value is returned once, then reset to 0.

READ A SINGLE CHARACTER

integer file, char;
char = $fgetc(file);
char = $getc();
The function $fgetc reads a single character from the specified file and returns it. If the end-of-file is reached, $fgetc returns EOF. You should use a 32-bit register to hold the result from $fgetc to tell the difference between the character with the value 255 and EOF. $getc reads from stdin.

PUSH BACK A CHARACTER

integer file;
reg [7:0] char, r;
r = $ungetc(char, file);
The function $ungetc pushes the character back into the file stream. That character will be the next read by $fgetc. It returns the character if it was successfully pushed back or EOF if it fails.

Note that since there is no $ungetc for stdin in C, there will not be one in the file I/O package.

WRITE A SINGLE CHARACTER

integer stream, r, char;
r = $fputc(stream, char);
The function $fputc writes a single character to the specified file. It returns EOF if there was an error, 0 otherwise.

READ A STRING

integer file, n, r;
reg [n*8-1:0] string;
r = $fgets(string, n, file);
r = $gets(string);
The function $fgets reads a string from the file. Characters are read from the file into string until a newline is seen, end-of-file is reached, or n-1 characters have been read. If the end-of-file is encountered, $fgets returns a 0 and string is unchanged; otherwise, $fgets returns a 1. $gets reads from stdin.

The function $gets is no longer supported by default in fileio v3.4. If you want to use it, you must compile fileio.c with -DGETS. This is because some C compilers will give an error message when compiling fileio.c:


fileio.o: In function `fileio_gets_call`:
fileio.o: the gets function is dangerous and should not be used
You can either ignore this message, or stop using -DGETS to remove the gets function call from fileio.c.

READ FORMATTED TEXT

integer file, count;
count = $fscanf(file, format, args);
count = $sscanf(string, format, args);
count = $scanf(format, args);
The function $fscanf parses formatted text from the file according to the format and writes the results to args. $sscanf parses formatted text from a string. $scanf parses formated text from stdin. See a C reference manual for detailed information on fscanf, plus examples later in this note.

The format can be either a string constant or a reg. It can contain:

  • Whitespace characters such as space, tab (\t), or newline (\n). One or more whitespace characters are treated as a single character, and can match zero or more whitespace characters from the input.
  • Conversion specifications which start with a %. Next is an optional *, which suppresses assignment. Then is an optional field width in decimal. Lastly is the operator character as follows:
  • b -- Binary values 0, 1, X, x, Z, z, _
  • d -- Decimal values 0-9, _, no X, x, Z, or z. Note that negative numbers are NOT supported because of a Verilog language limitation.
  • o -- Octal values 0-7, _, X, x, Z, z
  • h or x -- Hexadecimal values, 0-9, A-F, a-f, _, X, x, Z, z
  • c -- A single character
  • f -- A floating point number, no _, X, x, Z, or z
  • s -- A string
  • % -- The percent character
  • Other characters which must match the characters read from the file. Special characters are \" for the " character, \\ for the \ character, \oNNN is a single character whose ASCII value is specified by the octal number NNN, and %% for the character %.
The args is an optional list of registers to be assigned by $fscanf, $sscanf, and $scanf. There must be a register for each conversion operator (except those with %*). Bit subscripts are ignored.

Formatting & padding is closer to Verilog than C. For example, %x of 16'h24 is '0024', not '24', and %0x returns '24', not '0024'.

$fscanf, $sscanf, and $scanf return the number of successful assignments performed. If you do not want a return value from these routines, compile fileio.c (and veriuser.c for Cadence users) with -Dscanf_task. VCS users should switch from fileio.tab to fileio_task.tab

FIND THE FILE POSITION

integer file, position;
position = $ftell(file);
The function $ftell returns the position in the file for use by $fseek. If there is an error, it returns a -1.

POSITION A FILE

`define SEEK_SET 0
`define SEEK_CUR 1
`define SEEK_END 2
integer file, offset, position, r;
r = $fseek(file, 0, `SEEK_SET); /* Beginning */
r = $fseek(file, 0, `SEEK_CUR); /* No effect */
r = $fseek(file, 0, `SEEK_END); /* End of file */
r = $fseek(file, position, `SEEK_SET); /* Previous loc */
The function $fseek allows random access in a file. You can position at the beginning or end of a file, or use the position returned from $ftell.

READ BINARY DATA

integer r, file, start, count;
reg [15:0] mem[0:10], r16;
r = $fread(file, mem[0], start, count);
r = $fread(file, r16);
The function $fread reads a binary file into a Verilog memory. The first argument is either a register or a memory name, which must have a subscript, though the value of the subscript is ignored. start and count are optional.

By default $fread will store data in the first data location through the final location. For the memory up[10:20], the first location loaded would be up[10], then up[11]. For down[20:10], the first location would be down[10], then down[11].

start and count are ignored if $fread storing data in a reg instead of a memory. No warning is printed if the file contains more data than will fit in the memory.

start is the word offset from the lowest element in the memory. For start = 2 and the memory up[10:20], the first data would be loaded at up[12]. For the memory down[20:10] , the first location loaded would be down[12], then down[13].

$fread returns the number of elements read from the file, If $fread terminates early because of an error, it will return the number of elements successfully read. $feof can be used to determine whether the end-of-file was reached during $fread.

The data in the file is broken into bytes according to the width of the memory. An 8-bit wide memory takes one byte per location, while a 9-bit wide memory takes 2 bytes. Care should be taken when using memories with widths not evenly divisible by 8 as there may be gaps in the data in the memory vs. data in the file.

The $fread system task only works with NC-Verilog if you use the -MEMPACK switch as in:

ncverilog +ncvlogargs+-NOMEMPACK foo.v

WRITING A FORMATTED STRING

integer file, r, a, b;
reg [80*8:1] string;
file = $fopenw("output.log");
r = $sformat(string, "Formatted %d %x", a, b);
r = $sprintf(string, "Formatted %d %x", a, b);
r = $fprintf(file, "Formatted %d %x", a, b);
The functions $sformat and $sprintf writes a formatted string into a Verilog register.  The two functions are identical. $fprintf writes a formatted string to a file.  It has most, but not the formatting capabilites of C stdio package.  The first argument is a register to receive the formatted data, and the second is a format string.  Additional arguments may be included.

The supported formats include b, c, d, e, f, g, h, m, o, r, s, and x. %t for printing formatted time is NOT supported yet.

FLUSHING THE FILE STREAM

integer file, r;
file = $fopenw("output.log");
r = $fflush(file);
The function $fflush(stream) causes any buffered data waiting to be written for the named stream to be written to that file. If the stream is 0, all files open for writing are flushed.


Restrictions and Caveats


You should be aware of following restrictions in using these Verilog functions vs. the stdio functions in C, which are imposed by the Verilog language :
  • Because these are Verilog system functions, you must always use the return value as in:
r = $fscanf(...)
  • Verilog does not allow assignments inside a conditional. Thus the C code fragment:
while (c=fgetc(stream) != EOF) {
    <process input>
    }
turns into the Verilog code:
c = $fgetc(file);
while (c !== `EOF)
    begin
    <process input>
    c = $fgetc(file);
    end
  • $fgets and $gets return only a single bit, 0 = error, 1 = no error, unlike fgets / gets in C, which return a string pointer.
  • $fread is very different from fread in C. The order of arguments is different, and the arguments are oriented towards writing to a Verilog memory instead of a C character string. See page 5 for more info.
  • $fscanf can not be used to read binary files, or any files with null characters. $fprintf can not be used to write binary files with null characters. Because of the string processing that $fscanf uses, a null in the middle of an ASCII field will prematurely terminate the field.
In addition, $save / $restart are loosely supported with VCS on SunOS. In a test, $feof never returned EOF when running from a save file, but $fgetc did. On other simulators and hardware platforms you can mimic these functions using $ftell and $fseek to find the position in a file and later jump to that location.

The maximum number of files (MAX_FILES) is set in the C code to 12. The maximum string size is 1000 characters. There is no known limit to the number of conversion operators in $fscanf or $sscanf.


Reading pattern files


This first example shows how to read input stimulus from a text file.

This is the pattern file - read_pattern.pat , included in the examples directory:

// This is a pattern file
// time bin dec hex
10: 001 1 1
20.0: 010 20 020
50.02: 111 5 FFF
62.345: 100 4 DEADBEEF
75.789: XXX 2 ZzZzZzZz
Note that the binary and hexadecimal values have X and Z values, but these are not allowed in the decimal values. You can use white space when formatting your file to make it more readable. Lastly, any line beginning with a / is treated as a comment.

The module read_pattern.v reads the time for the next pattern from an ASCII file. It then waits until the absolute time specified in the input file, and reads the new values for the input signals (bin, dec, hex). The time in the file is a real value and, when used in a delay, is rounded according to the timescale directive. Thus the time 75.789 is rounded to 75.79 ns.

`timescale 1ns / 10 ps
`define EOF 32'hFFFF_FFFF
`define NULL 0
`define MAX_LINE_LENGTH 1000

module read_pattern;
integer file, c, r;
reg [3:0] bin;
reg [31:0] dec, hex;
real real_time;
reg [8*`MAX_LINE_LENGTH:0] line; /* Line of text read from file */

initial
    begin : file_block
    $timeformat(-9, 3, "ns", 6);
    $display("time bin decimal hex");
    file = $fopenr("read_pattern.pat");
    if (file == `NULL) // If error opening file
        disable file_block; // Just quit

    c = $fgetc(file);
    while (c != `EOF)
        begin
        /* Check the first character for comment */
        if (c == "/")
            r = $fgets(line, `MAX_LINE_LENGTH, file);
        else
            begin
            // Push the character back to the file then read the next time
            r = $ungetc(c, file);
            r = $fscanf(file," %f:\n", real_time);

            // Wait until the absolute time in the file, then read stimulus
            if ($realtime > real_time)
                $display("Error - absolute time in file is out of order - %t",
                        real_time);
                else
                    #(real_time - $realtime)
                        r = $fscanf(file," %b %d %h\n",bin,dec,hex);
                end // if c else
            c = $fgetc(file);
        end // while not EOF

    r = $fcloser(file);
    end // initial

// Display changes to the signals
always @(bin or dec or hex)
    $display("%t %b %d %h", $realtime, bin, dec, hex);

endmodule // read_pattern

Comparing outputs with expected results


The following model, compare.v, reads a file containing both
stimulus and expected results. The input signals are toggled at the
beginning of a clock cycle and the output is compared just before the
end of the cycle.

`define EOF 32'hFFFF_FFFF
`define NULL 0
`define MAX_LINE_LENGTH 1000
module compare;
integer file, r;
reg a, b, expect, clock;
wire out;
reg [`MAX_LINE_LENGTH*8:1];
parameter cycle = 20;

initial
    begin : file_block
    $display("Time Stim Expect Output");
    clock = 0;

    file = $fopenr("compare.pat");
    if (file == `NULL)
        disable file_block;

    r = $fgets(line, MAX_LINE_LENGTH, file); // Skip comments
    r = $fgets(line, MAX_LINE_LENGTH, file);

    while (!$feof(file))
        begin
        // Wait until rising clock, read stimulus
        @(posedge clock)
        r = $fscanf(file, " %b %b %b\n", a, b, expect);

        // Wait just before the end of cycle to do compare
        #(cycle - 1)
        $display("%d %b %b %b %b", $stime, a, b, expect, out);
        $strobe_compare(expect, out);
        end // while not EOF

    r = $fcloser(file);
    $stop;
    end // initial

always #(cycle / 2) clock = !clock; // Clock generator

and #4 (out, a, b); // Circuit under test
endmodule // compare

Reading script files


Sometimes a detailed simulation model for a device is not available, such as a 
microprocessor. As a substitute, you can write a bus-functional model which reads
a script of bus transactions and performs these actions. The following, script.v,
reads a file with commands plus data values.

`define EOF 32'hFFFF_FFFF
`define NULL 0
module script;
integer file, r;
reg [80*8:1] command;
reg [31:0] addr, data;

initial
    begin : file_block
    clock = 0;

    file = $fopenr("script.txt");
    if (file == `NULL)
        disable file_block;

    while (!$feof(file))
        begin
        r = $fscanf(file, " %s %h %h \n", command, addr, data);
        case (command)
        "read":
            $display("READ mem[%h], expect = %h", addr, data);
        "write":
            $display("WRITE mem[%h] = %h", addr, data);
        default:
            $display("Unknown command '%0s'", command);
        endcase
        end // while not EOF

    r = $fcloser(file);
    end // initial
endmodule // script

The file script.txt is the script read by the above model:
read 9 0
write 300a feedface
read 2FF xxxxxxxx
bad

Reading data files into memories


Reading a formatted ASCII file is easy with the system tasks. The following
is an example of reading a binary file into a Verilog memory. $fread can
also read a file one word at a time and copy the word into memory, but
this is about 100 times slower than using $fread to read the entire array
directly.

This is the file load_mem.v

`define EOF 32'HFFFF_FFFF
`define MEM_SIZE 200_000

module load_mem;

integer file, i;
reg [7:0] mem[0:`MEM_SIZE];
reg [80*8:1] file_name;

initial
    begin
    file_name = "data.bin";
    file = $fopenr(file_name);
    i = $fread(file, mem[0]);
    $display("Loaded %0d entries \n", i);
    i = $fcloser(file);
    $stop;
    end

endmodule // load_mem

The file data.bin contains the 200 binary values 0 to 199. You can
look at the program data.c which generated the file. To dump out the binary
file in Unix use the command od data.bin


Linking with VCS


Note that VCS 6.1 and later supports the IEEE-1364 2001 standard.
To use the file I/O system functions with VCS, you will need to:

  1. Compile fileio.c with the command:

  2. cc -c fileio.c -I$VCS_HOME/include

    On the DEC/Alpha use:

    cc -c fileio.c -I$VCS_HOME/`vcs -platform`/lib -taso -xtaso_short

    On Windows, use the Microsoft C++ compiler included with VCS:

    cl -c -Zp4 fileio.c

    The -Zp4 switch tells the compiler to use longword alignment. Note
    that the compiler produces fileio.obj, not fileio.o. In the example below,
    if you compile on Windows, change the file extension.

    Note that the system variable "include" must contain a reference
    to the VCS include files, such as:

    c:\vcs422\Windows_NT\lib


  3. Compile your Verilog model with the fileio routines on Unix with:
% vcs load_mem.v fileio.o -P fileio.tab -R
                         Chronologic VCS (TM)
              Version 5.1 -- Tue Jan 11 09:00:41 2000
               Copyright (c) 1991-2000 by Synopsys Inc.
                         ALL RIGHTS RESERVED
 
This program is proprietary and confidential information of Synopsys Inc.
and may be used and disclosed only as authorized in a license agreement
controlling such use and disclosure.
 
Compiling load_mem.v
Top Level Modules:
load_mem
( cd csrc ; make -f Makefile DEFAULT_RUNTIME=TRUE product )
../simv up to date
Chronologic VCS simulator copyright 1991-2000
Contains Synopsys proprietary information.
Compiler version 5.1; Runtime version 5.1;  Jan 11 09:00 2000

Loaded 200 entries

$stop at time 0 Scope: load_mem File: load_mem.v Line: 13
cli_0 >

Linking with Verilog-XL


Verilog-XL does not natively support the IEEE-1364 2001 tasks except through
this PLI application.

Note: this information is based on an older version of Verilog-XL.
Send me an update if you have one.

To use the file I/O system functions with Verilog-XL, you will need to:


  1. Modify your veriuser.c to point to the system functions in fileio.c
    . You should copy these two files into your current directory from the
    examples directory.


  2. Type vconfig to generate a script to link Verilog-XL. Use the following
    table to choose your responses.

Running vconfig 

Prompt issued from vconfig : 

You type: 

Please enter the name of the output script cr_vlog
Please choose a target 1  Stand Alone
Please choose how to link in PLI application 4  Static with user PLI application
What do you want to name the Verilog-XL target?  verilog_fileio
Do you want to compile for the SimVision environment?  n
Do you want to include GR_WAVES n
Do you want to include the Simulation History Manager n
The LAI interface in no longer supported n
Do you want to include the LMSI HARDWARE MODELER interface software in this executable?  return
Do you want to include the Verilog Mixed-Signal interface software in this executable?  return
Do you want to include the Standard Delay File Annotator in this executable?  return
The user template file 'veriuser.c' must always be included in the link statement. What is the path name of this file?  ./veriuser.c
Please list any other user files to be linked with this Verilog-XL ... terminating with a single '.'  ./fileio.c

. (period)


  • Add the switch -Dverilogxl to cr_vlog to compile fileio.c:
  • cc -Dverilogxl -o verilog_read $1 $2 -g \
       ...
       fileio.c \
       ...

  • Run cr_vlog and link Verilog-XL, producing the new executable verilog_read

  • Run the new executable and simulate your models with calls to the read
    functions.

  • You should see the following printed when you run verilog_read to simulate
    the model load_mem.v :
% ./verilog_read load_mem.v
VERILOG-XL 2.1.12 Jun 21, 1995 14:55:32

Copyright (c) 2000 Cadence Design Systems, Inc. All Rights Reserved.
.
.
.
<<< Routines for file read linked in >>
Compiling source file "load_mem.v"
Highest level modules:
load_mem

Loaded 200 entries

L13 "load_mem.v": $stop at simulation time 0
Type ? for help
C1>

Linking with MTI


MTI's ModelSim 5.5 and later offer native support these IEEE-1364 2001
system tasks.

Create fileio.so, the shareable object:

        make MTI=1 fileio.so
or:     gcc -c -g fileio.c -DMTI -I$MTI_PATH/include
        ld -G -Bdynamic -o fileio.so fileio.o
Compile and run your design with:
        rm -rf work
        vlib work

        vlog test1.v    # Your Verilog code here
        vsim -c test1 -pli fileio.so -do "run -all"
You might have to set the environment variable LD_LIBRARY_PATH to point
to the directory where fileio.so resides.

Linking with NC-Verilog


NC-Verilog 3.3 and later offer native support for these IEEE-1364 2001
system tasks.

NC-Verilog does not support the tf_nodeinfo PLI call which is used in
several places by fileio.c. If you want to use these system functions with
NC-Verilog, compile fileio.c with the -DNCVerilog switch. This will disable
the $fread routine, and passing some strings using a register, such as
the format string to $fscanf.

If you have any information on linking with NC-Verilog, please pass
it on to me!

You can use makefile_fileio_ncv to compile and link with NC-Verilog.
I make no promises!

系统分类: CPLD/FPGA  |  用户分类: ASIC DESIGN  |  标签: verilog file IO read write fopen fclose  |  来源: 转贴  | 

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发表于 2009/5/12 10:28:02

1

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reset的处理

对于reset的处理:
1. 设计:
1.1 对于从芯片pad进来的reset信号,与clock相位无关,所以一定是异步的。在设计时要现将pad引进来的reset同步化,然后更给内部flip-flop使用。synchronizer结构如下:



1.2 内部逻辑使用异步reset或同步reset设计都可以。但是最好不要混用。

1.3 内部逻辑使用多个时钟域时,reset进入每个时钟后都要用同步器同步。如果是从快速时钟域进入慢速时钟域,reset要增加其assertion宽度,保证对慢速时钟域有效。

1.4 有些人建议在reset之后再启动clock(gating clock),这样做的好处:
  1)meta-stable问题不存在了。
  2)利于STA分析,recovery/removal分析不用做了。
  3)后端工具也不用做所谓的reset tree,省面积,省功耗。
不好之处:
  1)对于同步reset设计无效果。

2. DC综合(DC synthesis)
2.1 对于从pad引进的reset,应该将其设成false_path:
    set_false_path [get_ports reset]

2.2 对于同步后的reset,DC综合室时应将其设置成:
    set_ideal_network [get_pins rst]
  这样DC不会对reset信号进行优化,不会进行DRC检查。
    set_dont_touch_network [get_pins rst]
  这样DC不会对reset信号进行优化。

2.3 如果内部设计是同步reset设计,在读入hdl之前还要设定:
   hdlin_ff_sync_set_reset
  这样DC会将同步reset在combinational逻辑之后在和在一起,输入给flip-flop的D端。

2.4 reset tree的生成,skew balance等工作交给后端处理。

3. STA
3.1 布局布线后做静态仿真,根据reset和clock的关系决定是否检查recovery/removal violation。对于reset时关掉clock的设计,reset动作前后保证没有clock,可以set_false_path。其它就要检查recovery/removal。

3.2 对于同步reset设计,不需要关心recovery/removal,因为reset是连到flip-flop的D端,和其它逻辑一样,做setup/hold检查。

4. P&R
4.1 encounter中处理(参考:http://www.edacn.net/bbs/viewthread.php?tid=52252&page=1)
  1)去掉dont_touch
  2)设置max_transition/fanout/cap
  3)优化
  3)或者用bufferTreeSynthesis为reset信号作buffer tree
  4)布线
  5)再做power analysis就没问题了

5. DFT综合
5.1 有内部控制的异步reset时(如子模块的reset由其他模块的寄存器输出控制),由其异步reset的flip-flop不做scan chain插入。

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发表于 2009/4/22 19:00:15

1

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用vim比较文件(Using vim to compare files)

1. 使用vim的比较模式打开两个文件:
   vim -d file1 file2

   vimdiff file1 file2

2. 如果已经打开了文件file1,再打开另一个文件file2进行比较:
   :vert diffsplit file2
如果没有用vert命令,diffsplit则会分上下两个窗口。

3. 如果已经用split方式打开了两个文件file1,file2,又想比较两文件的不同。
   分别在两个窗口里面输入命令:
   :diffthis

4. 如果更改了某个窗口的内容,vim又没有自动更新diff检查,可以使用如下命令更新:
   :diffupdate

5. 定位到不同点:
   [c     跳到前一个不同点
   ]c     跳到后一个不同点

6. 在窗口间跳转:
   ctrl-w w    跳到下一个窗口
   ctrl-w h    跳到左侧窗口
   ctrl-w l    跳到右侧窗口
   ctrl-w j    跳到下方的窗口
   ctrl-w k    跳到上方的窗口

7. 合并文档:
   dp          将差异点的当前文档内容应用到另一文档(diff put)
   do          将差异点的另一文档的内容拷贝到当前文档(diff get)

8. 上下文的展开和查看
    比较和合并文件的时候经常需要结合上下文来确定最终要采取的操作。Vimdiff 缺省是会把不同之处上下各 6 行的文本都显示出来以供参考。其他的相同的文本行被自动折叠。如果希望修改缺省的上下文行数为3行,可以这样设置:
    :set diffopt=context:3

可以用简单的折叠命令来临时展开被折叠的相同的文本行:
    zo          (folding open, z这个字母看上去比较像折叠的纸)


然后可以用下列命令来重新折叠:
    zc          (folding close)

系统分类: CPLD/FPGA  |  用户分类: ASIC DESIGN  |  标签: vim 文件比较 linux  |  来源: 整理  | 

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发表于 2009/3/10 11:30:38

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Logic shapes for DIA

This package is the newly updated logic shapes used in DIA, a opensource diagram program. Unpack the rar file to dia's install path.

The dia's URL: http://live.gnome.org/Dia


http://space.ednchina.com/upload/2009/4/30/bf8857d9-f01a-4d3b-b51c-cdb4878f718a.rar

系统分类: CPLD/FPGA  |  用户分类: ASIC DESIGN  |  标签: Diagram DIA Visio Logic  |  来源: 原创  | 

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发表于 2008/12/28 22:18:51

1

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使用svn图形客户端Rapidsvn和Meld进行文件比较

1. 安装RapidSvn
  [root@localhost]#yum install rapidsvn
如果没有wxWidgets和subversion,这两个软件包也会被安装。
  RapidSvn的界面如下:
    点击看大图
2. 使用Meld进行文件比较
  2.1 安装Meld
    [root@localhost]#yum install meld

  2.2 配置RapidSvn使用Meld
    在RapidSvn的菜单View->Preferences,选择Programs下的DiffTool选项卡,按如下图配置。
   

  选择MergeTool选项卡,按如下图配置:
   

  2.3 Meld的使用界面:
    点击看大图

另外,Meld还可以用来比较文件夹。

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发表于 2008/12/12 21:53:34

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awk guide

awk详解

作者:cicc 2005-02-03 15:53:59 来自:Linux先生

awk 是一种程序语言,对文档资料的处理具有很强的功能。awk 名称是由它三个最初设计者的姓氏的第一个字母而命名的: Alfred V. AhoPeter J. WeinbergerBrian W. Kernighan

awk最初在1977年完成。1985年发表了一个新版本的awk,它的功能比旧版本增强了不少。awk能够用很短的程序对文档里的资料做修改、比较、提取、打印等处理。如果使用C pascal等语言编写程序完成上述的任务会十分不方便而且很花费时间,所写的程序也会很大。

awk不仅仅是一个编程语言,它还是Linux系统管理员和程序员的一个不可缺少的工具。awk语言本身十分好学,易于掌握,并且特别的灵活。

gawk G N U计划下所做的awkgawk 最初在1986年完成,之后不断地被改进、更新。gawk 包含awk 的所有功能。

1 gawk的主要功能

gawk 的主要功能是针对文件的每一行( l i n e ),也就是每一条记录,搜寻指定的格式。当某一行符合指定的格式时,gawk 就会在此行执行被指定的动作。gawk 依此方式自动处理输入文件的每一行直到输入文件档案结束。

gawk经常用在如下的几个方面:

  • 根据要求选择文件的某几行,几列或部分字段以供显示输出。

  • 分析文档中的某一个字出现的频率、位置等。

  • 根据某一个文档的信息准备格式化输出。

  • 以一个功能十分强大的方式过滤输出文档。

  • 根据文档中的数值进行计算。

2 如何执行gawk程序

基本上有两种方法可以执行gawk程序。

如果gawk 程序很短,则可以将gawk 直接写在命令行,如下所示:

gawk 'program' input-file1 input-file2 ...

其中program 包括一些pattern action

如果gawk 程序较长,较为方便的做法是将gawk 程序存在一个文件中,gawk 的格式如下所示:

gawk -f program-file input-file1 input-file2 ...

gawk 程序的文件不止一个时,执行gawk 的格式如下所示:

gawk -f program-file1 -f program-file2 ... input-file1 input-file2 ...

3 文件、记录和字段

一般情况下,gawk可以处理文件中的数值数据,但也可以处理字符串信息。如果数据没有存储在文件中,可以通过管道命令和其他的重定向方法给gawk提供输入。当然, gawk只能处理文本文件(ASCI I码文件)。

电话号码本就是一个gawk可以处理的文件的简单例子。电话号码本由很多条目组成,每一个条目都有同样的格式:姓、名、地址、电话号码。每一个条目都是按字母顺序排列。在gawk中,每一个这样的条目叫做一个记录。它是一个完整的数据的集合。例如,电话号码本中的Smith John这个条目,包括他的地址和电话号码,就是一条记录。记录中的每一项叫做一个字段。在gawk中,字段是最基本的单位。多个记录的集合组成了一个文件。

大多数情况下,字段之间由一个特殊的字符分开,像空格、TAB、分号等。这些字符叫做
字段分隔符。请看下面这个/ e t c / p a s s w d文件:

tparker; t36s62hsh; 501; 101; Tim Parker; /home/tparker; /bin/bash

etreijs; 2ys639dj3h; 502; 101; Ed Treijs; /home/etreijs; /bin/tcsh

ychow; 1h27sj; 503; 101; Yvonne Chow; /home/ychow; /bin/bash

你可以看出/etc/passwd文件使用分号作为字段分隔符。/etc/passwd文件中的每一行都包括七个字段:用户名;口令;用户ID;工作组ID;注释; home目录;启始的外壳。如果你想要查找第六个字段,只需数过五个分号即可。

但考虑到以下电话号码本的例子,你就会发现一些问题:

Smith John 13 Wilson St. 555-1283

Smith John 2736 Artside Dr Apt 123 555-2736

Smith John 125 Westmount Cr 555-1726

虽然我们能够分辨出每个记录包括四个字段,但gawk却无能为力。电话号码本使用空格作为分隔符,所以gawk认为Smith是第一个字段, John 是第二个字段,13是第三个字段,依次类推。就gawk而言,如果用空格作为字段分隔符的话,则第一个记录有六个字段,而第二个记录有八个字段。

所以,我们必须找出一个更好的字段分隔符。例如,像下面一样使用斜杠作为字段分隔符:

Smith/John/13 Wilson St./555-1283

Smith/John/2736 Artside Dr/Apt/123/555-2736

Smith/John/125 Westmount Cr/555-1726

如果你没有指定其他的字符作为字段分隔符,那么gawk将缺省地使用空格或TA B作为字段分隔符。

4 模式和动作

gawk语言中每一个命令都由两部分组成:一个模式(pattern)和一个相应的动作
action)。只要模式符合,gawk就会执行相应的动作。其中模式部分用两个斜杠括起来,而动作部分用一对花括号括起来。例如:

/ p a t t e r n 1 / { a c t i o n 1 }

/ p a t t e r n 2 / { a c t i o n 2 }

/ p a t t e r n 3 / { a c t i o n 3 }

所有的g a w k程序都是由这样的一对对的模式和动作组成的。其中模式或动作都能够被省略,但是两个不能同时被省略。如果模式被省略,则对于作为输入的文件里面的每一行,动作都会被执行。如果动作被省略,则缺省的动作被执行,既显示出所有符合模式的输入行而不做任何的改动。

下面是一个简单的例子,因为gawk 程序很短,所以将gawk 程序直接写在外壳命令行:

gawk '/tparker/' /etc/passwd

此程序在上面提到的/etc/passwd文件中寻找符合tparker模式的记录并显示(此例中没有动作,所以缺省的动作被执行)。

让我们再看一个例子:

gawk '/UNIX/{print $2}' file2.data

此命令将逐行查找file2.data文件中包含U N I X的记录,并打印这些记录的第二个字段。
你也可以在一个命令中使用多个模式和动作对,例如:

gawk '/scandal/{print $1} /rumor/{print $2}' gossip_file

此命令搜索文件gossip_file中包括scandal的记录,并打印第一个字段。然后再从头搜索
gossip_file
中包括rumor的记录,并打印第二个字段。

5 比较运算和数值运算

gawk有很多比较运算符,下面列出重要的几个:

= = 相等

! = 不相等

> 大于

< 小于

> = 大于等于

< = 小于等于

例如:

gawk '$4 > 100' testfile

将会显示文件testfile 中那些第四个字段大于1 0 0的记录。

下表列出了gawk中基本的数值运算符。

运算符说明示例

  • 加法运算2+6

  • - 减法运算6-3

  • * 乘法运算2*5

  • / 除法运算8/4

  • ^ 乘方运算3^2 (=9)

  • % 求余数9%4 (=1)

例如:

{print $3/2}

显示第三个字段被2除的结果。

gawk中,运算符的优先权和一般的数学运算的优先权一样。例如:

{print $1+$2*$3}

显示第二个字段和第三个字段相乘,然后和第一个字段相加的结果。你也可以用括号改变优先次序。例如:

{print ($1+$2)*$3}

显示第一个字段和第二个字段相加,然后和第三个字段相乘的结果。

6 内部函数

gawk中有各种的内部函数,现在介绍如下:

6.1 随机数和数学函数

  • sqrt(x) x 的平方根

  • sin(x) x 的正弦函数

  • cos(x) x 的余弦函数

  • atan2(xy) x / y的余切函数

  • log(x) x 的自然对数

  • exp(x) x e 次方

  • int(x) x 的整数部分

  • rand() 0 1之间的随机数

  • srand(x) x 设置为rand( )的种子数

6.2 字符串的内部函数

index(infind) 在字符串in 中寻找字符串find 第一次出现的地方,返回值是字符串find 出现在字符串in 里面的位置。如果在字符串in 里面找不到字符串find,则返回值为0

例如:

print index("peanut""an" )

显示结果3

length(string) 求出string 有几个字符。

例如:

length("abcde")

显示结果5

match(stringregexp)在字符串string 中寻找符合regexp 的最长、最靠左边的子字符串。返回值是regexp string 的开始位置,即index值。match 函数将会设置系统变量RSTART等于index的值,系统变量RLENGTH 等于符合的字符个数。如果不符合,则会设置RSTA RT0RLENGTH -1

sprintf(formatexpression1. . . ) printf 类似,但是sprintf 并不显示,而是返回字符串。例如:

sprintf("pi = %.2f (approx.)"22/7)

返回的字符串为pi = 3.14 (approx.)

sub(regexpreplacementtarget) 在字符串target 中寻找符合regexp 的最长、最靠左的
地方,以字串replacement 代替最左边的regexp。例如:

str = "waterwatereverywhere"

sub(/at/"ith"str)

结果字符串s t r会变成

witherwatereverywhere

gsub(regexpreplacementtarget) 与前面的sub类似。在字符串target 中寻找符合regexp的所有地方,以字符串replacement 代替所有的regexp。例如:

str = "waterwatereverywhere"

gsub(/at/"ith"str)

结果字符串str会变成

witherwithereverywhere

substr(stringstartlength) 返回字符串string 的子字符串,这个子字符串的长度为length,从第start 个位置开始。例如:

substr("washington"53 )

返回值为ing

如果没有length ,则返回的子字符串是从第start 个位置开始至结束。例如:

substr("washington"5 )

返回值为ington

tolower(string) 将字符串string的大写字母改为小写字母。例如:

tolower("MiXeD cAsE 123")

返回值为mixed case 123

toupper(string) 将字符串string的小写字母改为大写字母。例如:

toupper("MiXeD cAsE 123")

返回值为MIXED CASE 123

6.3 输入输出的内部函数

close(filename) 将输入或输出的文件filename关闭。

system(command) 此函数允许用户执行操作系统的指令,执行完毕后将回到gawk
序。例如:

BEGIN {system("ls")}

7 字符串和数字

字符串就是一连串的字符,它可以被gawk逐字地翻译。字符串用双引号括起来。数字不能用双引号括起来,并且gawk将它当作一个数值。例如:

gawk '$1 != "Tim" {print}' testfile

此命令将显示第一个字段和Tim不相同的所有记录。如果命令中Tim两边不用双引号,
gawk
将不能正确执行。

再如:

gawk '$1 == "50" {print}' testfile

此命令将显示所有第一个字段和50这个字符串相同的记录。gawk不管第一字段中的数值的大小,而只是逐字地比较。这时,字符串50和数值50并不相等。

8 格式化输出

我们可以让动作显示一些比较复杂的结果。例如:

gawk '$1 != "Tim" {print $1$ 5$ 6$2}' testfile

将显示testfile文件中所有第一个字段和Tim不相同的记录的第一、第五、第六和第二个字段。

进一步,你可以在print动作中加入字符串,例如:

gawk '$1 != "Tim" {print "The entry for "$ 1"is not Tim. "$2}' testfile

print动作的每一部分用逗号隔开。借用C语言的格式化输出指令,可以让gawk的输出形式更为多样。这时,应该用printf而不是print。例如:

{printf "%5s likes this language\n"$2 }

printf中的%5s 部分告诉gawk 如何格式化输出字符串,也就是输出5个字符长。它的值由printf 的最后部分指出,在此是第二个字段。\ n是回车换行符。如果第二个字段中存储的是人名,则输出结果大致如下:

Tim likes this language

G e o ff likes this language

Mike likes this language

Joe likes this language

gawk 语言支持的其他格式控制符号如下:

c如果是字符串,则显示第一个字符;如果是整数,则将数字以ASCII 字符的形式显示。例如:

printf “%c”65

结果将显示字母A

d 显示十进制的整数。

i 显示十进制的整数。

e 将浮点数以科学记数法的形式显示。

例如:

print “$4.3e”1950

结果将显示1.950e+03

f 将数字以浮点的形式显示。

g 将数字以科学记数法的形式或浮点的形式显示。数字的绝对值如果大于等于0.0001
以浮点的形式显示,否则以科学记数法的形式显示。

o 显示无符号的八进制整数。

s 显示一个字符串。

x 显示无符号的十六进制整数。1015af表示。

X 显示无符号的十六进制整数。1015AF表示。

% 它并不是真正的格式控制字符,% %将显示%

当你使用这些格式控制字符时,你可以在控制字符前给出数字,以表示你将用的几位或几
个字符。例如,6d表示一个整数有6位。再请看下面的例子:

{printf "%5s works for %5s and earns %2d an hour"$ 1$ 2$ 3 }

将会产生类似如下的输出:

Joe works for Mike and earns 12 an hour

当处理数据时,你可以指定数据的精确位数

{printf "%5s earns $%.2f an hour"$ 3$ 6 }

其输出将类似于:

Joe earns $12.17 an hour

你也可以使用一些换码控制符格式化整行的输出。之所以叫做换码控制符,是因为gawk对这些符号有特殊的解释。下面列出常用的换码控制符:

\a 警告或响铃字符。

\b 后退一格。

\f 换页。

\n 换行。

\r 回车。

\t Tab

\v 垂直的tab

9 改变字段分隔符

gawk中,缺省的字段分隔符一般是空格符或TAB。但你可以在命令行使用- F选项改变字符分隔符,只需在- F后面跟着你想用的分隔符即可。

gawk -F";" '/tparker/{print}' /etc/passwd

在此例中,你将字符分隔符设置成分号。注意: -F必须是大写的,而且必须在第一个引号之前。

10 元字符

gawk语言在格式匹配时有其特殊的规则。例如,cat能够和记录中任何位置有这三个字符
的字段匹配。但有时你需要一些更为特殊的匹配。如果你想让cat只和concatenate匹配,则需要在格式两端加上空格:

/ cat / {print}

再例如,你希望既和cat又和CAT匹配,则可以使用或(|):

/ cat | CAT / {print}

gawk中,有几个字符有特殊意义。下面列出可以用在gawk格式中的这些字符:

^ 表示字段的开始。例如:

$3 ~ /^b/

如果第三个字段以字符b开始,则匹配。

$ 表示字段的结束。例如:

$3 ~ /b$/

如果第三个字段以字符b结束,则匹配。

. 表示和任何单字符m匹配。

例如:

$3 ~ /i.m/

如果第三个字段有字符i,则匹配。

| 表示“或”。例如:

/ cat | CAT/

cat CAT字符匹配。

* 表示字符的零到多次重复。例如:

/UNI*X/

UNXUNIXUNIIXUNIIIX等匹配。

+ 表示字符的一次到多次重复。例如:

/UNI+X/

UNIXUNIIX等匹配。

\{ab\} 表示字符a次到b次之间的重复。例如:

/UNI\{13\}X/

UNIXUNIIXUNIIIX匹配。

? 表示字符零次和一次的重复。例如:

/UNI?X/

UNX UNIX匹配。

[] 表示字符的范围。例如:

/I[BDG]M/

IBMIDMIGM匹配

[^] 表示不在[ ]中的字符。例如:

/I[^DE]M/

和所有的以I开始、M结束的包括三个字符的字符串匹配,除了I D MI E M之外。

11 调用gawk程序

当需要很多对模式和动作时,你可以编写一个gawk程序(也叫做gawk脚本)。在gawk程序中,你可以省略模式和动作两边的引号,因为在gawk程序中,模式和动作从哪开始和从哪结束时是很显然的。

你可以使用如下命令调用gawk程序:

gawk -f script filename

此命令使gawk对文件filename执行名为scriptgawk程序。

如果你不希望使用缺省的字段分隔符,你可以在f选项后面跟着F选项指定新的字段分隔符(当然你也可以在gawk程序中指定),例如,使用分号作为字段分隔符:

gawk -f script -F";" filename

如果希望gawk 程序处理多个文件,则把各个文件名罗列其后:

gawk -f script filename1 filename2 filename3 ...

缺省情况下, gawk的输出将送往屏幕。但你可以使用Linux的重定向命令使gawk的输出送往一个文件:

gawk -f script filename > save_file

12 BEGINEND

有两个特殊的模式在gawk中非常有用。BEGIN模式用来指明gawk开始处理一个文件之前执行一些动作。BEGIN经常用来初始化数值,设置参数等。END模式用来在文件处理完成后执行一些指令,一般用作总结或注释。

BEGIN E N D中所有要执行的指令都应该用花括号括起来。BEGIN END必须使用大写。请看下面的例子:

BEGIN { print "Starting the process the file" }

$1 == "UNIX" {print}

$2 > 10 {printf "This line has a value of %d"$ 2 }

END { print "Finished processing the file. Bye!"}

此程序中,先显示一条信息: Starting the process the file,然后将所有第一个字段等于
UNIX
的整条记录显示出来,然后再显示第二个字段大于10 的记录,最后显示信息: Finished processing the file. Bye!

13 变量

gawk中,可以用等号( = )给一个变量赋值:

var1 = 10

gawk中,你不必事先声明变量类型。

请看下面的例子:

$1 == "Plastic" { count = count + 1 }

如果第一个字段是Plastic,则count的值加1。在此之前,我们应当给count赋予过初值,一般是在BEGIN部分。

下面是比较完整的例子:

BEGIN { count = 0 }

$5 == "UNIX" { count = count + 1 }

END { printf "%d occurrences of UNIX were found"count }

变量可以和字段和数值一起使用,所以,下面的表达式均为合法:

count = count + $6

count = $5 – 8

count = $5 + var1

变量也可以是格式的一部分,例如:

$2 > max_value {print "Max value exceeded by "$2 – max_value}

$4 - var1 < min_value {print "Illegal value of "$ 4 }

14 内置变量

gawk语言中有几个十分有用的内置变量,现在列于下面:

NR 已经读取过的记录数。

FNR 从当前文件中读出的记录数。

FILENAME 输入文件的名字。

FS 字段分隔符(缺省为空格)。

RS 记录分隔符(缺省为换行)。

OFMT 数字的输出格式(缺省为%g)。

OFS 输出字段分隔符。

ORS 输出记录分隔符。

NF 当前记录中的字段数。

如果你只处理一个文件,则NR FNR 的值是一样的。但如果是多个文件, NR是对所有
的文件来说的,而FNR 则只是针对当前文件而言。例如:

NR <= 5 {print "Not enough fields in the record"}

检查记录数是否小于5,如果小于5,则显示出错信息。FS十分有用,因为FS控制输入文件的字段分隔符。例如,在BEGIN格式中,使用如下的命令:

FS = " : "

15 控制结构

15.1 if 表达式

if 表达式的语法如下:

if (expression){

commands

}

else{

commands

}

例如:

# a simple if loop

(if ($1 == 0){

print "This cell has a value of zero"

}

else {

printf "The value is %d\n"$ 1

} )

再看下一个例子:

# a nicely formatted if loop

(if ($1 > $2){

print "The first column is larger"

}

else {

print "The second column is larger"

} )

15.2 while 循环

while 循环的语法如下:

while (expression){

commands

}

例如:

# interest calculation computes compound interest

# inputs from a file are the amountinterest_rateand years

{var = 1

while (var <= $3) {

printf("%f\n"$1*(1+$2)^var)

var++

}

}

15.3 for 循环

for 循环的语法如下:

for (initialization; expression; increment) {

command

}

例如:

# interest calculation computes compound interest

# inputs from a file are the amountinterest_rateand years

{for (var=1; var <= $3; var++) {

printf("%f\n"$1*(1+$2)^var)

}

}

15.4 next exit

next 指令用来告诉gawk 处理文件中的下一个记录, 而不管现在正在做什么。语法如下:

{

command1

command2

command3

next

command4

}

程序只要执行到next指令,就跳到下一个记录从头执行命令。因此,本例中, command4指令永远不会被执行。程序遇到exit指令后,就转到程序的末尾去执行END,如果有END的话。

16 数组

gawk语言支持数组结构。数组不必事先初始化。声明一个数组的方法如下:

arrayname[num] = value

请看下面的例子:

# reverse lines in a file

{line[NR] = $0 } # remember each line

END {var=NR # output lines in reverse order

while (var > 0){

print line[var]

var--

}

}

此段程序读取一个文件的每一行,并用相反的顺序显示出来。我们使用NR作为数组的下标来存储文件的每一条记录,然后在从最后一条记录开始,将文件逐条地显示出来。

17 用户自定义函数

复杂的gawk 程序常常可以使用自己定义的函数来简化。调用用户自定义函数与调用内部
函数的方法一样。函数的定义可以放在gawk 程序的任何地方。

用户自定义函数的格式如下:

function name (parameter-list) {

body-of-function

}

name 是所定义的函数的名称。一个正确的函数名称可包括一序列的字母、数字、下标线
(underscores)
,但是不可用数字做开头。parameter-list 是函数的全部参数的列表,各个参数之间以逗点隔开。body-of-function 包含gawk 的表达式,它是函数定义里最重要的部分,它决定函数实际要做的事情。

下面这个例子,会将每个记录的第一个字段的值的平方与第二个字段的值的平方加起来。

{print "sum ="SquareSum( $1$2 ) }

function SquareSum(xy) {

sum=x*x+y*y

return sum

}

到此,我们已经知道了gawk的基本用法。gawk语言十分易学好用,例如,你可以用gawk编写一段小程序来计算一个目录中所有文件的个数和容量。如果用其他的语言,如C语言,则会十分的麻烦,相反,gawk只需要几行就可以完成此工作。

18 几个实例

最后,再举几个gawk的例子:

gawk '{if (NF > max) max = NF}

END {print max}'

此程序会显示所有输入行之中字段的最大个数。

gawk 'length($0) > 80'

此程序会显示出超过80 个字符的每一行。此处只有模式被列出,动作是采用缺省值显示
整个记录。

gawk 'NF > 0'

显示拥有至少一个字段的所有行。这是一个简单的方法,将一个文件里的所有空白行删除。

gawk 'BEGIN {for (i = 1; i <= 7; i++)

print int(101 * rand())}'

此程序会显示出范围是0 100 之间的7 个随机数。

ls -l files | gawk '{x += $4}; END {print "total bytes: " x}'

此程序会显示出所有指定的文件的总字节数。

expand file | gawk '{if (x < length($0)) x = length($0)}

END {print "maximum line length is " x}'

此程序会将指定文件里最长一行的长度显示出来。expand 会将tab 改成space,所以是用实际的右边界来做长度的比较。

gawk 'BEGIN {FS = ":"}

{print $1 | "sort"}' /etc/passwd

此程序会将所有用户的登录名称,依照字母的顺序显示出来。

gawk '{nlines++}

END {print nlines}'

此程序会将一个文件的总行数显示出来。

gawk 'END {print NR}'

此程序也会将一个文件的总行数显示出来,但是计算行数的工作由gawk来做。

gawk '{print NR$ 0 } '

此程序显示出文件的内容时,会在每行的最前面显示出行号,它的函数与‘ cat -n’类似。


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发表于 2008/12/8 18:27:09

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关于投票

My first compiler - using flex

Question: I write a address generater, which use micro code to generate address. For generating the micro codes easily, I create a some symbols and syntax to descrbie the micro code, things like assembly languange, as following:

/*
JDNZ  Rx LABEL; {[0],[LABLE],[xx]}      # x = 4~7, LABEL is 5 bits. If Rx equals 0, load Rx to initial value and
                                        # execute next code by increase PC by 1. Otherwise, jump to LABEL to and
                                        # run;
ADDR0 #;        {[10],[######]}         # add constant to R0. constant is 1~64.
SWAPR Rm Rn;    {[1100],[mm],[nn]}      # swap Rm and Rn, m and n are from 0 to 3
RST;            {[11010],[xxx]}         # reset all R to initial value
NU;             {[11011],[xxx]}         # addr is not usable, that means give the ack signal to data interface but
                                        # the input data will not be saved to the internal ram.
ADD   Rx;       {[11100],[xxx]}         # addr Rx to addr.
INCLD Rx;       {[11101],[xxx]}         # load Rx to addr, then increase Rx by 1       
LD    Rx;       {[11110],[xxx]}         # load Rx to addr
RSTR  Rx;       {[11111],[xxx]}         # reset Rx to initial value
*/
// this is a comment line
// Define rbus index address and data address
INDEX    =    JCD_TBL_INDEX;
DATA    =    JCD_TBL_DATA;

  init  {
    R0 = 0;    //set the init value of Rx
    R1 = 64;
    R2 = 256;
    R3 = 256;
    R4 = 64;
    R5 = 4;
    R6 = 8;
    R7 = 2;
  }   

program  {
lbl0:
    INCLD R0;
    LD R2;
    ADD R4;
    INCLD R0;
    INCLD R2;
    ADD R4;
    JDNZ R5 lbl0;
    SWAPR R0 R1;
lbl1:
    INCLD R0;
    LD R2;
    ADD R4;
    INCLD R0;
    INCLD R2;
    ADD R4;
    JDNZ R5 lbl1;
    SWAPR R0 R1;
    SWAPR R2 R3;

    JDNZ R6 lbl0;

    ADDR0 #64;
    SWAPR R0     R1;
    ADDR0 #64;
    SWAPR R0  R1;

    JDNZ R7 lbl0      ;
   
    RST;
}


The init part inside "{" and "}" means how to initialize the R0~R7 registers. The program part inside "{" and "}" means micro code to generate the address. And INDEX is the configure register for index, DATA is the configure register for data.

Now, I need a compiler to convert the these "assembly" to appropriate micro code.
The expected output is like "RBUS[JCD_TBL_INDEX] = XXX;" or "RBUS[JCD_TBL_DATA] = XXX", which are use for C language.

Then I use flex to help me generate the pattern scanner and make the compiler works. The Flex file named compjcd.l is as following:

%{
//=======================================
// Compile the address generation code
// into binary micro code. Please Refer
// example, dec411.
//=======================================
#include <stdio.h>

int bFindInit=0, bFindProg=0;
int bFindLabel=0;
int bErr = 0;
int iPC=0;
int iLabel=0;
int aLabelPC[8];
char sLabel[8][64] = {"\0", "\0", "\0", "\0"} ;
char sBuff[64];
char sIndex[32], sData[32];
char PC[32];
int iTmp, iTmp2;
int i;
int condition;
%}

%option yylineno
%x COMMENT
%s INIT PROG

chars    [A-Za-z\_]
numbers    ([0-9])+
hex    0x([0-9])+
alpha     [0-9A-Za-z]
words    {chars}+({numbers}|{chars})*
sp    [\t ]
%%

"INDEX"{sp}*"="{sp}*({numbers}|{hex}|{words})+{sp}*";"    {    // find INDEX define
        //printf("%s\n", yytext);
        *(yytext+yyleng-1) = '\0';
        i = 5;
        while(*(yytext+i) != '=') // search '='
            i++;
       
        sscanf(yytext+i+1, "%s", sIndex);
        //printf("%s\n", sIndex);
    }

"DATA"{sp}*"="{sp}*({numbers}|{hex}|{words})+{sp}*";"    {    // find DATA define
        //printf("%s\n", yytext);
        *(yytext+yyleng-1) = '\0';
        i = 4;
        while(*(yytext+i) != '=') // search '='
            i++;
       
        sscanf(yytext+i+1, "%s", sData);
        //printf("%s\n", sData);
    }
       
"init"{sp}*"{"    {
        //printf("[I]@%d: Find \"init\".\n", yylineno);
        printf("//Initialize R0~R7\n");
        bFindInit=1;   
        BEGIN( INIT );
    }

<INIT>"}"    BEGIN( 0 );


<INIT>"R"[0-7]{1}{sp}*"="{sp}*({numbers}|{hex}){sp}*";"        {
        //printf("%s\n", yytext);
        *(yytext+yyleng-1) = '\0';
        iTmp = atoi(yytext+1);
        //printf("%d\n", iTmp);
        i = 2;
        while(*(yytext+i) != '=')    // search '='
            i++;
        sscanf(yytext+i+1, "%d", &iTmp2);
        iTmp *= 2; iTmp += 32;
        printf("RBUS[%s]=0x%02X;\n", sIndex, iTmp);
        printf("RBUS[%s]=0x%02X;\n", sData, iTmp2&0xff);
        iTmp++;
        printf("RBUS[%s]=0x%02X;\n", sIndex, iTmp);
        printf("RBUS[%s]=0x%02X;\n", sData, (iTmp2>>8)&0xff);
    }

"program"{sp}*"{" {
        //printf("[I]@%d: Find \"program\".\n", yylineno);
        printf("//Configure program\n");
        printf("RBUS[%s]=0x00;\n", sIndex);
        iPC=0;
        bFindProg=1;
        BEGIN( PROG );
    }

<PROG>"}"    BEGIN( 0 );

    /* find label */
<PROG>{chars}+{numbers}*":"    {
        aLabelPC[iLabel]=iPC;
        *(yytext+yyleng-1)='\0';
        //printf("[I]@%d: Find label: %s, number: %d\n", yylineno, yytext, iLabel);
        strcpy(sLabel[iLabel], yytext);
        iLabel++;
    }

    /* JDNZ */
<PROG>"JDNZ"{sp}+"R"[0-7]{1}{sp}+{words}{sp}*";"    {
        //printf("%s\n", yytext);
        *(yytext+yyleng-1) = ' ';
        i=4;
        while(*(yytext+i)!='R') {
            i++;
        }
        iTmp = atoi(yytext+i+1);
        //printf("%d\n", iTmp);
        if(iTmp < 4)    {
            bErr = 1;
            printf("[E]@%d: JDNZ: Evaluated register must be one of R4 to R7.\n", yylineno, yytext);
        }
        else
            iTmp -= 4;
        sscanf((yytext+i+2), "%s", sBuff);
        //printf("%s\n", sBuff);
        for(i=0; i<4; i++)
        {
            //printf("%s\n", sLabel[i]);
            if(strcmp(sBuff, sLabel[i])==0) {
                iTmp = iTmp+(aLabelPC[i]<<2);
                bFindLabel = 1;
            }
        }
        if(bFindLabel)    {
            printf("RBUS[%s]=0x%02X;", sData, iTmp);
            PC[iPC] = iTmp&0xFF;
            iPC++;
        }
        else {
            bErr = 1;
            printf("[E]@%d: JDNZ syntax error, jump label is not found.\n", yylineno);
        }
    }
<PROG>"JDNZ"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: JDNZ syntax error.\n", yylineno);
    }

    /* ADDR0 */
<PROG>"ADDR0"{sp}+"#"({numbers}|{hex}){sp}*";"    {
        //printf("%s\n", yytext);
        *(yytext+yyleng-1) = '\0';
        i = 5;
        while(*(yytext+i) != '#')
            i++;
        iTmp = atoi(yytext+i+1);
        //printf("%d\n", iTmp);
        if( (iTmp<1) || (iTmp>64) )    {
            bErr = 1;
            printf("[E]@%d: ADDR0 syntax error, constant must be value from 1 to 64.\n", yylineno);
        }
        else    {
            PC[iPC] = ((0x02<<6)+iTmp-1)&0xff;
            printf("RBUS[%s]=0x%02X;\n", sData, (0x02<<6)+iTmp-1);
            iPC++;
        }
    }
<PROG>"ADDR0"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: ADDR0 syntax error.\n", yylineno);
    }

    /* SWAPR */
<PROG>"SWAPR"{sp}+"R"[0-3]{1}{sp}+"R"[0-3]{1}{sp}*";"    {
        //printf("%s\n", yytext);
        *(yytext+yyleng-1) = '\0';
        iTmp=0;
        for(i=5; i<yyleng; i++) {
            if(*(yytext+i)=='R')
                iTmp = (iTmp<<2) + atoi(yytext+i+1);
        }
        PC[iPC] = ((0x0C<<4)+iTmp)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x0C<<4)+iTmp);
        iPC++;
    }
<PROG>"SWAPR"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: SWAPR syntax error.\n", yylineno);
    }

    /* RST */
<PROG>"RST"{sp}*";"    {
        //printf("%s\n", yytext);
        PC[iPC] = (0x1A<<3)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x1A<<3));
        iPC++;
    }
<PROG>"RST"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: RST syntax error.\n", yylineno);
    }

    /* NG */
<PROG>"NG"{sp}*";"    {
        //printf("%s\n", yytext);
        PC[iPC] = (0x1B<<3)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x1B<<3));
        iPC++;
    }
<PROG>"NG"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: NG syntax error.\n", yylineno);
    }

    /* ADD */
<PROG>"ADD"{sp}+"R"[0-7]{1}{sp}*";"    {
        //printf("%s\n", yytext);
        i=3;
        while(*(yytext+i) != 'R')
            i++;
        iTmp=atoi(yytext+i+1);

        PC[iPC] = ((0x1C<<3)+iTmp)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x1C<<3)+iTmp);
        iPC++;
    }
<PROG>"ADD"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: ADD syntax error.\n", yylineno);
    }

    /* INCLD */
<PROG>"INCLD"{sp}+"R"[0-7]{1}{sp}*";"    {
        //printf("%s\n", yytext);
        i=5;
        while(*(yytext+i) != 'R')
            i++;
        iTmp=atoi(yytext+i+1);
        PC[iPC] = ((0x1D<<3)+iTmp)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x1D<<3)+iTmp);
        iPC++;
    }
<PROG>"INCLD"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: INCLD syntax error.\n", yylineno);
    }

    /* LD */
<PROG>"LD"{sp}+"R"[0-7]{1}{sp}*";"    {
        //printf("%s\n", yytext);
        i=2;
        while(*(yytext+i) != 'R')
            i++;
        iTmp=atoi(yytext+i+1);
        PC[iPC] = ((0x1E<<3)+iTmp)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x1E<<3)+iTmp);
        iPC++;
    }
<PROG>"LD"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: LD syntax error.\n", yylineno);
    }

    /* RSTR */
<PROG>"RSTR"{sp}+"R"[0-7]{1}{sp}*";"    {
        //printf("%s\n", yytext);
        i=4;
        while(*(yytext+i) != 'R')
            i++;
        iTmp=atoi(yytext+i+1);
        PC[iPC] = ((0x1F<<3)+iTmp)&0xff;
        printf("RBUS[%s]=0x%02X;\n", sData, (0x1F<<2)+iTmp);
        iPC++;
    }

<PROG>"RSTR"{sp}+.    {
        bErr = 1;
        printf("[E]@%d: RSTR syntax error.\n", yylineno);
    }

    /* Line Comment */
"//"[^\n]*   

    /* Block Comment */
"/*"    BEGIN( COMMENT );
<COMMENT>.    /* output nothing when comment */
<COMMENT>"*"+"/"    BEGIN( 0 );

{words}+{sp}*";"    {
        bErr = 1;
        printf("[E]@%d: Unknown code: %s.\n", yylineno, yytext);
    }

{words}        {
        bErr = 1;
        printf("[E]@%d: %s is unknown. Maybe \";\" is missing at end of line.\n", yylineno, yytext);
    }

.        /* outout nothing when other alphas */

<<EOF>>    {
        if(bFindInit==0)
        {
            bErr = 1;
            printf("[E] 0: init part is not found!");
        }
        if(bFindProg==0)
        {
            bErr = 1;
            printf("[E] 1: program part is not found!");
        }
        return 0;
    }
%%

int main(argc, argv)
int argc;
char **argv;
{
    FILE* hFileOut;
    for(i=0; i<32; i++)
    {
        PC[i] = 0;
    }
    yylex();
    return 0;
}

int yywrap()
{
    return 1;
}

Then, generate the compiler:
 $flex compjcd.l



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发表于 2008/11/3 17:11:46

2

关于投票

Setup Linux Workstation

1. Hardware:

    * MotherBoard: GigaByte GA-MA770-DS3
        o NorthBridge: AMD770
        o SouthBridge: AMD SB600
        o NetCard: RTL8111B on board
    * GraphicCard: GEFORCE 7200GS    PCI-E socket
    * Memory: 8GB
    * HardDisk: Seagate 320GB*2, SATA

2. OS: RHEL AS4 update 4, kernel: 2.6.9-42

3. RAID1 Configuration:
    * Close the RAID feature for SATA in BIOS. Set it to be Native IDE.
    * Create soft-RAID partitions on /dev/sda, as following:

        /dev/sda1    196MB           #/boot
        /dev/sda2    294998MB     #/
        /dev/sda3    10048MB       #swap

    * Create same partitions on /dev/sdb as well as /dev/sda.
    * Create RAID device, set the RAID level to be RAID 1

        /dev/md0    /boot    ext3
        /dev/md1    /        ext3
        /dev/md2             swap

4. GRUB Installation:
    Install GRUB to /dev/md1, the mount point of /.

5. Firewall:
    * permit SSH
    * permit FTP
    * default linux: SELinux

6. Language:
    Simplified Chinese

7. Setup Root Password

8. Install Netcard on board
    * Download the latest RTL8111B driver.
    * Compile, install and run.
    * Config eth0:
        o IP
        o DNS
        o Gateway
        o ComputerName

9. Add new users

10. Configure VNC server.
  Refer to my blog: http://blog.ednchina.com/olivernie/117746/message.aspx

11. Configure GRUB to load system automatically
    * Problem:
It is strange that GRUB won't load system automatically when workstation is rebooted. The screen shows "grub>" and do nothing. However, linux can be load by command "configfile grub.conf".

    * Resolution:
        Install grub on MBR of both of sda and sdb. Commands as follows:
            o Install grub on MBR of sda. Note the (hd0,0) refers to the /boot
               grub>root (hd0,0)
               grub>setup (hd0)

            o Install grub on MBR of sdb. Note the (hd1,0) refers to the /boot
               grub>root (hd1,0)
               grub>setup (hd1)






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发表于 2008/10/13 16:43:31

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Hierarchical Wire Load Models

Hierarchical Wire Load Models(Comes from DC user guide)

DC supports three modes for determining which wire load model to use for nets that cross hierarchical boundaries:

Top

DC models nets as if the design has no hierarchy and uses the wire load model specified for the top level of the design hierarchy for all nets in a design and its subdesigns. The tool ignores any wire load models set on subdesigns with the set_wire_load_model command.

Use top mdoe if you plan to flatten the design at a higher level of hierarchy before layout.

Enclosed
DC uses the wire load model of the smallest design that fully encloseds the net. If the design enclosing the net has no wire load model, the tool traverses the design hierearchy upward until it finds a wire load model. Enclosed mode is more accurate than top mode when cells in the same design are placed in a contiguous region during layout.

Use enclosed mode if the design are placed in physical hierarchies.

Segmented
DC determines the wire load models of each segment of a net by the design encompassing the segment. Nets crossing hierarchical boundaries are divided into segments. For each net segment, DC uses the wire load model of the design containing the segment. If the design contains a segment that has no wire load model, the tool traverses the design hierarchy upward until it finds a wire load model.

Use segmented mdoe if the wire load models in your technology have been characterized with net segments.

Following Figure shows a sample design with a cross-hierarchy net, cross_net. The top level of the hierarchy(design TOP) has a wire load model of 50x50. The next level of hierarchy(design MID) has a wire load model of 40x40. The leaf-level designs, A and B, have wire load models of 20x20 and 30x30, respectively.

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